Datasheet

R01DS0064EJ0120 Rev.1.20 Page 72 of 109
Feb 6, 2013
R32C/117 Group 5. Electrical Characteristics
Note:
1. The device is operationally guaranteed under these operating conditions.
Figure 5.1 Clock Cycle Time
Table 5.5 Operating Conditions (4/5)
(V
CC
= 3.0 to 5.5 V, V
SS
= 0 V, and T
a
=T
opr
, unless otherwise noted)
(1)
Symbol Characteristic
Value
Unit
Min. Typ. Max.
f
(XIN)
Main clock oscillator frequency
416MHz
f
(XRef)
Reference clock frequency
24MHz
f
(PLL)
PLL clock oscillator frequency
96 128 MHz
f
(Base)
Base clock frequency High speed version 64 MHz
Normal speed version 50 MHz
t
c(Base)
Base clock cycle time High speed version 15.625 ns
Normal speed version 20 ns
f
(CPU)
CPU operating frequency High speed version 64 MHz
Normal speed version 50 MHz
t
c
(CPU)
CPU clock cycle time High speed version 15.625 ns
Normal speed version 20 ns
f
(BCLK)
Peripheral bus clock operating
frequency
High speed version 32 MHz
Normal speed version 25 MHz
t
c
(BCLK)
Peripheral bus clock cycle time High speed version 31.25 ns
Normal speed version 40 ns
f
(PER)
Peripheral clock source frequency
32 MHz
f
(XCIN)
Sub clock oscillator frequency
32.768 62.5 kHz
Base clock
(internal signal)
t
c(Base)
Peripheral bus clock
(internal signal)
t
c(BCLK)
CPU clock
(internal signal)
t
c(CPU)