Datasheet

A- 1
Revision History R32C/116 Group Datasheet
Rev. Date
Description
Page Summary
1.00 Nov 19, 2009 — Initial release
1.10 Jun 23, 2010 — Second edition released
This manual in general
— • Applied new Renesas templates and formats to the manual
• Changed company name to “Renesas Electronics Corporation” and
changed related descriptions due to business merger of Renesas
Technology Corporation and NEC Electronics Corporation (under
Chapters 1 and 5)
• Added specifications of 64 MHz version
Chapter 1. Overview
3, 5 • Deleted Note 1 from Tables 1.2 and 1.4
9 • Deleted Note 4 from Figure 1.2
19 • Modified expression “fC” in Table 1.14 to “low speed clocks”
Chapter 4. SFRs
34, 37 • Changed register name “Group i Timer Measurement Prescaler
Register” in
Tables 4.6 and 4.9 to “Group i Time Measurement
Prescaler Register”
39 • Modified expression “XY Control Register” in
Table 4.11 to “X-Y
Control Register”
41 • Changed register name “UART2 Transmission/Receive Mode
Register” in
Table 4.13 to “UART2 Transmit/Receive Mode Register”;
Changed hexadecimal format of reset values for registers TABSR,
ONSF, and TRGSR to binary
52 • Changed register name “External Interrupt Source Select Register i” in
Table 4.24 to “External Interrupt Request Source Select Register i”
Chapter 5. Electrical Characteristics
63 • Changed expressions “CS0” and “A23 to A0, BC3 to BC0” in Figure
5.5
to “Chip select” and “Address”, respectively
Appendix 1. Package Dimensions
95 • Added a seating plane to the drawing of package dimension
1.20 Feb 6, 2013 — Third edition released
This manual in general
— • Changed document number “REJ03B0253-0110” to
“R01DS0063EJ0120”
• Modified expressions “version N”, “version D”, and “version P” to “N
version”, “D version”, and “P version”, respectively (under Chapters 1
and 5)
Chapter 1. Overview
— • Modified wording and enhanced description in this chapter
2, 4 • Modified expressions “Main clock oscillator stop/re-oscillation
detection”, “calculation transfer”, “chained transfer”, and “inputs/
outputs” in
Tables 1.1 and 1.3 to “Main clock oscillator stop/restart
detection”, “calculation result transfer”, “chain transfer”, and “I/O ports”,
respectively
7 • Completed “under development” phase of versions D and P products
in
Table 1.6