Datasheet

R01DS0063EJ0120 Rev.1.20 Page 92 of 95
Feb 6, 2013
R32C/116 Group 5. Electrical Characteristics
Figure 5.9 External Bus Timing for Multiplexed Bus
CS0 to CS3
A23 to A8, BC0 to BC3
RD
D31 to D8
t
h(R-D)
t
h(R-S)
External bus timing (multiplexed bus)
Read cycle
t
w(R)
t
su(S-ALE)
t
h(R-A)
t
su(A-ALE)
Write cycle
WR, WR0 to WR3
t
su(D-R)
Measurement conditions
Criterion for
input voltage
Criterion for
output voltage
V
IH
V
IL
V
OH
V
OL
2.5 V
0.8 V
2.0 V
0.8 V
1.5 V
0.5 V
2.4 V
0.5 V
Item
ALE
t
w(ALE)
Address
t
su(A-ALE)
A15/D15 to A0/D0,
BC0/D0, BC2/D1
Data
t
h(ALE-A)
t
d(ALE-R)
t
h(R-D)
t
su(D-R)
CS0 to CS3
A23 to A8, BC0 to BC3
D31 to D8
t
h(W-D)
t
h(W-S)
t
w(W)
t
su(S-ALE)
t
h(W-A)
t
su(A-ALE)
t
su(D-W)
ALE
t
w(ALE)
Address
t
su(A-ALE)
A15/D15 to A0/D0,
BC0/D0, BC2/D1
Data
t
h(ALE-A)
t
d(ALE-W)
t
h(W-D)
t
su(D-W)
t
dis(R-A)
t
dis(R-D)
t
cR
t
cW
V = 4.2 to 5.5 V
CC
V = 3.0 to 3.6 V
CC