Datasheet

R01DS0063EJ0120 Rev.1.20 Page 86 of 95
Feb 6, 2013
R32C/116 Group 5. Electrical Characteristics
V
CC
=3.3V
Timing Requirements (V
CC
= 3.0 to 3.6 V, V
SS
= 0 V, and T
a
=T
opr
, unless otherwise noted)
Note:
1. The value is calculated using the formulas below based on a value SSC set by bits SSC4 to SSC0 in
the I2CSSCR register:
t
h(SDA-SCL)S
= SSC ÷ 2 × t
c(IIC)
+ 40 [ns]
t
su(SCL-SDA)P
= (SSC ÷ 2 + 1) × t
c(IIC)
+ 40 [ns]
t
w(SDAH)P
= (SSC + 1) × t
c(IIC)
+ 40 [ns]
Table 5.60 Multi-master I
2
C-bus Interface
Symbol Characteristic
Value
UnitStandard-mode Fast-mode
Min. Max. Min. Max.
t
w(SCLH)
MSCL input high level pulse width
600 600 ns
t
w(SCLL)
MSCL input low level pulse width
600 600 ns
t
r(SCL)
MSCL input rise time
1000 300 ns
t
f(SCL)
MSCL input fall time
300 300 ns
t
r(SDA)
MSDA input rise time
1000 300 ns
t
f(SDA)
MSDA input fall time
300 300 ns
t
h(SDA-SCL)S
MSCL high level hold time after
START condition/repeated START
condition
(1)
2 × t
c(IIC)
+ 40
ns
t
su(SCL-SDA)P
MSCL high level setup time for
repeated START condition/STOP
condition
(1)
2 × t
c(IIC)
+ 40
ns
t
w(SDAH)P
MSDA high level pulse width after
STOP condition
(1)
4 × t
c(IIC)
+ 40
ns
t
su(SDA-SCL)
MSDA input setup time
100 100 ns
t
h(SCL-SDA)
MSDA input hold time
00ns