Datasheet

R01DS0063EJ0120 Rev.1.20 Page 63 of 95
Feb 6, 2013
R32C/116 Group 5. Electrical Characteristics
Timing Requirements (V
CC
= 3.0 to 5.5 V, V
SS
= 0 V, and Ta = T
opr
, unless otherwise noted)
Figure 5.5 Flash Memory CPU Rewrite Mode Timing
Table 5.14 Flash Memory CPU Rewrite Mode Timing
Symbol Characteristics
Value
Unit
Min. Max.
t
cR
Read cycle time
200 ns
t
su(S-R)
Chip-select setup time before read
200 ns
t
h(R-S)
Chip-select hold time after read
0ns
t
su(A-R)
Address setup time before read
200 ns
t
h(R-A)
Address hold time after read
0ns
t
w(R)
Read pulse width
100 ns
t
cW
Write cycle time
200 ns
t
su(S-W)
Chip-select setup time before write
0ns
t
h(W-S)
Chip-select hold time after write
30 ns
t
su(A-W)
Address setup time before write
0ns
t
h(W-A)
Address hold time after write
30 ns
t
w(W)
Write pulse width
50 ns
Chip select
Address
RD
t
h(R-S)
Read cycle
t
w(R)
t
su(S-R)
t
h(R-A)
t
su(A-R)
Write cycle
Chip select
Address
WR
t
h(W-S)
t
w(W)
t
su(S-W)
t
h(W-A)
t
su(A-W)
t
cW
t
cR