Datasheet

R01DS0063EJ0120 Rev.1.20 Page 2 of 95
Feb 6, 2013
R32C/116 Group 1. Overview
1.1.2 Performance Overview
Tables 1.1 to 1.4 list the performance overview of the R32C/116 Group.
Note:
1. Contact a Renesas Electronics sales office to use the optional features.
Table 1.1 Performance Overview for the 144-pin Package (1/2)
Unit Function Explanation
CPU Central
processing unit
R32C/100 Series CPU Core
Basic instructions: 108
Minimum instruction execution time: 15.625 ns (f(CPU) = 64 MHz)
Multiplier: 32-bit × 32-bit 64-bit
Multiply-accumulate unit: 32-bit × 32-bit + 64-bit 64-bit
IEEE-754 compatible FPU: Single precision
32-bit barrel shifter
Operating mode: Single-chip mode, memory expansion mode,
microprocessor mode (optional
(1)
)
Memory Flash memory: 384 Kbytes to 1 Mbyte
RAM: 40 K/48 K/63 Kbytes
Data flash: 4 Kbytes × 2 blocks
Refer to Table 1.5 for each product’s memory size
Voltage
Detector
Low voltage
detector
Optional
(1)
Low voltage detection interrupt
Clock Clock generator 4 circuits (main clock, sub clock, PLL, on-chip oscillator)
Oscillation stop detector: Main clock oscillator stop/restart detection
Frequency divide circuit: Divide-by-2 to divide-by-24 selectable
Low power modes: Wait mode, stop mode
External Bus
Expansion
Bus and memory
expansion
Address space: 4 Gbytes (of which up to 64 Mbytes is user
accessible)
External bus Interface: Support for wait-state insertion, 4 chip select
outputs
Bus format: Separate bus/Multiplexed bus selectable, data bus width
selectable (8/16/32 bits)
Interrupts Interrupt vectors: 261
External interrupt inputs: NMI, INT × 9, key input × 4
Interrupt priority levels: 7
Watchdog Timer 15 bits × 1 (selectable input frequency from prescaler output)
DMA DMAC 4 channels
Cycle-steal transfer mode
Request sources: 57
2 transfer modes: Single transfer, repeat transfer
DMAC II Triggered by an interrupt request of any peripheral
3 characteristic transfer functions: Immediate data transfer,
calculation result transfer, chain transfer
I/O Ports Programmable
I/O ports
2 input-only ports
120 CMOS I/O ports (of which 32 are 5 V tolerant)
A pull-up resistor is selectable for every 4 input ports (except 5 V
tolerant inputs)