Datasheet

R01DS0098EJ0180 Rev.1.80 Page 183 of 208
May 13, 2014
RX63N Group, RX631 Group 5. Electrical Characteristics
Note: The above specification values apply when there is no access to the external bus during A/D conversion. If access proceeds
during A/D conversion, values may not fall within the above ranges.
Note 1. The conversion time includes the sampling time and the comparison time. As the test conditions, the number of sampling states
is indicated.
Note 2. The value in parentheses indicates the sampling time.
Table 5.29 12-Bit A/D Conversion Characteristics
Conditions: VCC = AVCC0 = VREFH = VCC_USB = 2.7 to 3.6 V, VREFH0 = 2.7 V to AVCC0
VSS = AVSS0 = VREFL/VREFL0 = VSS_USB = 0 V
PCLK = 8 to 50 MHz
T
a
= T
opr
Item Min. Typ. Max. Unit
Test
Conditions
Resolution — — 12 Bit
Conversion
time*
1
(Operation
at PCLK =
50 MHz)
AN0 to AN7 Permissible signal source impedance
(max.) = 1.0 kΩ
1.0 (0.4)*
2
— — µs Sampling
in 20
states
Other channels Permissible signal source impedance
(max.) = 1.0 kΩ, AVCC
 3.0 V
2.0 (1.4)*
2
— — µs Sampling
in 70
states
Permissible signal source impedance
(max.) = 1.0 kΩ, AVCC
 2.7 V
5.6 (5.0)*
2
— — µs Sampling
in 250
states
Analog input capacitance — — 30 pF
Offset error — ±2.0 ±7.5 LSB
Full-scale error — ±2.0 ±7.5 LSB
Quantization error — ±0.5 — LSB
Absolute accuracy — ±2.5 ±8.0 LSB
DNL differential nonlinearity error — ±2.0 ±4.0 LSB
INL integral nonlinearity error — ±2.0 ±4.0 LSB
Table 5.30 A/D Internal Reference Voltage Characteristics
Conditions: VCC = AVCC0 = VREFH = VCC_USB = 2.7 to 3.6 V, VREFH0 = 2.7 V to AVCC0
VSS = AVSS0 = VREFL/VREFL0 = VSS_USB = 0 V
PCLK = 8 to 50 MHz
T
a
= T
opr
Item Min. Typ. Max. Unit
Test
Conditions
A/D Internal reference voltage 1.45 1.50 1.55 V