Datasheet

R01DS0098EJ0180 Rev.1.80 Page 158 of 208
May 13, 2014
RX63N Group, RX631 Group 5. Electrical Characteristics
Figure 5.26 SDRAM Space Multiple Read Bus Timing
SDCLK pin
Note 1: Address pins for output of the precharge-setting command (Precharge-sel) for SDRAM.
ACT RD
RD RD
RD PRA
A18 to A0
t
AD2
t
AD2
t
AD2
t
AD2
t
AD2
t
AD2
t
AD2
t
AD2
AP*
1
SDCS#
RAS#
CAS#
WE#
CKE
DQMn
D31 to D0
C1 C2 C3
Row
Address
C0
(Column Address)
t
AD2
t
AD2
t
AD2
t
AD2
t
AD2
t
CSD2
t
CSD2
t
CSD2
t
CSD2
t
CSD2
t
RASD
t
RASD
t
RASD
t
RASD
t
RASD
t
CASD
t
CASD
t
CASD
t
WED
t
WED
(High)
t
DQMD
t
DQMD
t
RDS2
t
RDH2
t
RDS2
t
RDH2
PRA
command