Datasheet

R01DS0098EJ0180 Rev.1.80 Page 56 of 208
May 13, 2014
RX63N Group, RX631 Group 1. Overview
Table 1.9 List of Pins and Pin Functions (100-Pin TFLGA) (1/5)
Pin No.
Power Supply
Clock
System
Control
I/O Port
Bus
EXDMAC
Timers Communications
Interrupt
S12AD
AD
DA
100-pin
TFLGA
(MTU, TPU,
TMR, PPG,
RTC, POE)
(ETHERC, SCIc,
SCId, RSPI, RIIC,
CAN, IEB, USB)
A1 P05 IRQ13 DA1
A2 VREFH
A3 P07 IRQ15 ADTRG0#
A4 VREFL0
A5 P43 IRQ11-DS AN003
A6 PD0 D0[A0/D0] IRQ0 AN008
A7 PD4 D4[A4/D4] POE3# IRQ4 AN012
A8 PE0 D8[A8/D8] SCK12/SSLB1 ANEX0
A9 PE1 D9[A9/D9] MTIOC4C/
PO18
TXD12/SMOSI12/
SSDA12/TXDX12/
SIOX12/SSLB2/
RSPCKB
ANEX1
A10 PE2 D10[A10/D10] MTIOC4A/
PO23
RXD12/SMISO12/
SSCL12/RXDX12/
SSLB3/MOSIB
IRQ7-DS AN0
B1 EMLE
B2 AVSS0
B3 AVCC0
B4 P40 IRQ8-DS AN000
B5 P44 IRQ12-DS AN004
B6 PD1 D1[A1/D1] MTIOC4B CTX0
*1
IRQ1 AN009
B7 PD3 D3[A3/D3] POE8# IRQ3 AN011
B8 PD6 D6[A6/D6] MTIC5V/
POE1#
IRQ6 AN6
B9 PD7 D7[A7/D7] MTIC5U/
POE0#
IRQ7 AN7
B10 PE3 D11[A11/D11] MTIOC4B/
PO26/POE8#
CTS12#/RTS12#/
SS12#/MISOB/
ET_ERXD3
AN1
C1 VCL
C2 VREFL
C3 PJ3 MTIOC3C CTS6#/RTS6#/
CTS0#/RTS0#/
SS6#/SS0#
C4 VREFH0
C5 P42 IRQ10-DS AN002
C6 P47 IRQ15-DS AN007
C7 PD2 D2[A2/D2] MTIOC4D CRX0
*1
IRQ2 AN010
C8 PD5 D5[A5/D5] MTIC5W/
POE2#
IRQ5 AN013
C9 PE5 D13[A13/D13] MTIOC4C/
MTIOC2B
RSPCKB/
ET_RX_CLK/
REF50CK
IRQ5 AN3
C10 PE4 D12[A12/D12] MTIOC4D/
MTIOC1A/
PO28
SSLB0/ET_ERXD2 AN2
D1 XCIN