Datasheet

R01DS0098EJ0180 Rev.1.80 Page 50 of 208
May 13, 2014
RX63N Group, RX631 Group 1. Overview
Note 1. The BCLK function is multiplexed with the I/O port function for pin P53, so the port function is not available if the external bus is
enabled.
Note 2. Enabled only for the ROM capacity: 2 Mbytes/1.5 Mbytes
N7 TRDATA3 P55 WAIT#/
EDREQ0
MTIOC4D/TMO3 CRX1/ET_EXOUT IRQ10
N8 VSS
N9 PC7 A23/CS0# MTIOC3A/MTCLKB/
TIOCB6/TMO2/PO31
TXD8/SMOSI8/SSDA8/
MISOA/ET_COL
IRQ14
N10 TRSYNC P82 EDREQ1 MTIOC4A/PO28 TXD10/SMOSI10/SSDA10/
ET_ETXD1/RMII_TXD1
N11 PC3 A19 MTIOC4D/TCLKB/PO24 TXD5/SMOSI5/SSDA5/
IETXD/ET_TX_ER
N12 P75 CS5# PO20 SCK11/ET_ERXD0/
RMII_RXD0
N13 P74 CS4# PO19 CTS11#/RTS11#/SS11#/
ET_ERXD1/RMII_RXD1
Table 1.7 List of Pins and Pin Functions (145-Pin TFLGA) (5/5)
Pin No.
Power Supply
Clock
System Control I/O Port
Bus
EXDMAC
SDRAMC
Timers Communications
Interrupt
S12AD
AD
DA
145-pin
TFLGA
(MTU, TPU, TMR, PPG,
RTC, POE)
(ETHERC, SCIc, SCId,
RSPI, RIIC, CAN, IEB,
USB, and PDC)