Datasheet
R01DS0098EJ0180 Rev.1.80 Page 206 of 208
May 13, 2014
RX63N Group, RX631 Group REVISION HISTORY
1.60 Mar 13. 2013 Feature
1 Changed
1. Overview
2 to 7 Table 1.1 Outline of Specifications: changed, note added
8 Table1.2 Comparison of Functions for Different Packages in the RX63N/RX631 Group, changed
9 to 15 Table 1.3 List of Products, changed
16 Figure 1.1 How to Read the Product Part No., changed
17
Figure 1.2 Block Diagram, changed
24 to 32 Figure 1.3 to Figure 1.11 Pin Assignment: note, added
53 to 57 Table 1.9 List of Pins and Pin Functions (100-Pin TFLGA), added
62 to 64 Table 1.11 List of Pins and Pin Functions (64-Pin LQFP), added
65, 66 Table 1.12 List of Pins and Pin Functions (48-Pin LQFP), added
3. Address Space
71 Figure 3.1 Memory Map in Each Operating Mode, changed
4. I/O Registers
75 to 120 Table 4.1 List of I/O Registers (Address Order), changed
5. Electrical Characteristics
All Characteristics and timing conditions in the tables, changed
124, 125 Table 5.4 DC Characteristics (3), changed
126 Table 5.5 DC Characteristics (4), changed
127 5.3 AC Characteristics, changed
130, 131 Table 5.11, Clock Timing (Except for Sub-Clock Related): Condition and the table, changed, note,
added
132 Table 5.12 Clock Timing (Sub-Clock Related): Condition and the table, changed, note, added
176 Table 5.33 Battery Backup Function Characteristics: Condition, changed
Appendix 1.Package Dimensions
189 Figure H 64-pin LQFP (PLQP0064KB-A), added
190 Figure I 48-pin LQFP (PLQP0048KB-A), added
1.70 Oct 08. 2013 Features
1 changed
1. Overview
2 to 7 Table 1.1 Outline of Specifications, General I/O ports, Packages, changed, Parallel data capture
unit (PDC), added.
8 Table 1.2 Comparison of Functions for Different Packages in the RX63N/RX631 Group, 64-pin
LQFP, changed, 64-pin TFLGA, Parallel data capture unit (PDC), added.
9 to 16 Table 1.3 List of Products, changed.
17 Figure 1.1 How to Read the Product Part No., changed
18 Figure 1.2 Block Diagram, changed
19 to 24 Table 1.4 Pin Functions,changed, Parallel data capture unit (PDC), added
32 Figure 1.10 Pin Assignment (64-Pin TFLGA), added
35 to 40 Table 1.5 List of Pin and Pin Functions (177-Pin TFLGA, 176-Pin LFBGA), changed
41 to 45 Table 1.6 List of Pin and Pin Functions (176-Pin LQFP), changed
46 to 50 Table 1.7 List of Pins and Pin Functions (145-Pin TFLGA), changed
51 to 55 Table 1.8 List of Pins and Pin Functions (144-Pin LQFP), changed
65 to 66 Table 1.11 List of Pins and Pin Functions (64-Pin TFLGA), added
3. Address Space
76 Figure 3.1 Memory Map in Each Operating Mode, changed
4. I/O Registers
79 (4) Restrictions in Relation to RMPA and String-Manipulation Instructions, added
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