Datasheet

R01DS0098EJ0180 Rev.1.80 Page 151 of 208
May 13, 2014
RX63N Group, RX631 Group 5. Electrical Characteristics
Figure 5.17 Address/Data Multiplexed Bus Read Access Timing
Figure 5.18 Address/Data Multiplexed Bus Write Access Timing
Address bus/
data bus
Data read
(RD#)
t
AD
BCLK pin
Address bus
Address latch
(ALE)
Chip select
(CS1#)
t
ALED
T
W1
T
W2
T
n1
t
AD
t
AD
t
RDS
T
n2
t
RSD
t
RSD
T
W3
T
W4
T
W5
T
end
T
a1
T
a1
T
an
Address cycle
Data cycle
t
RDH
t
ALED
t
CSD
t
CSD
Address bus/
data bus
Data write
(WRm#)
t
AD
BCLK pin
Address bus
Address latch
(ALE)
Chip select
(CS1#)
t
ALED
T
W1
T
W2
T
n1
t
AD
t
AD
T
n2
t
WRD
t
WRD
T
W3
T
W4
T
W5
T
end
T
a1
T
a1
T
an
Address cycle
Data cycle
t
ALED
t
CSD
t
CSD
t
WDD
t
WDH
T
n3