Datasheet
R01DS0098EJ0180 Rev.1.80 Page 128 of 208
May 13, 2014
RX63N Group, RX631 Group 4. I/O Registers
000C 0100h ETHERC ETHERC mode register ECMR 32 32 5, 6 PCLKA — ETHERC
000C 0108h ETHERC Receive frame length register RFLR 32 32 5, 6 PCLKA —
000C 0110h ETHERC ETHERC status register ECSR 32 32 5, 6 PCLKA —
000C 0118h ETHERC ETHERC interrupt permission register ECSIPR 32 32 5, 6 PCLKA —
000C 0120h ETHERC PHY interface register PIR 32 32 5, 6 PCLKA —
000C 0128h ETHERC PHY status register PSR 32 32 5, 6 PCLKA —
000C 0140h ETHERC Random number generation counter upper limit setting
register
RDMLR 32 32 5, 6 PCLKA —
000C 0150h ETHERC IPG register IPGR 32 32 5, 6 PCLKA —
000C 0154h ETHERC Automatic PAUSE frame register APR 32 32 5, 6 PCLKA —
000C 0158h ETHERC Manual PAUSE frame register MPR 32 32 5, 6 PCLKA —
000C 0160h ETHERC PAUSE Frame receive counter register RFCF 32 32 5, 6 PCLKA —
000C 0164h ETHERC Automatic PAUSE frame retransmit count register TPAUSER 32 32 5, 6 PCLKA —
000C 0168h ETHERC PAUSE frame retransmit counter register TPAUSECR 32 32 5, 6 PCLKA —
000C 016Ch ETHERC Broadcast frame receive count setting register BCFRR 32 32 5, 6 PCLKA —
000C 01C0h ETHERC MAC address high register MAHR 32 32 5, 6 PCLKA —
000C 01C8h ETHERC MAC address low register MALR 32 32 5, 6 PCLKA —
000C 01D0h ETHERC Transmit retry over counter register TROCR 32 32 5, 6 PCLKA —
000C 01D4h ETHERC Delayed collision detect counter register CDCR 32 32 5, 6 PCLKA —
000C 01D8h ETHERC Lost carrier counter register LCCR 32 32 5, 6 PCLKA —
000C 01DCh ETHERC Carrier not detect counter register CNDCR 32 32 5, 6 PCLKA —
000C 01E4h ETHERC CRC error frame receive counter register CEFCR 32 32 5, 6 PCLKA —
000C 01E8h ETHERC Frame receive error counter register FRECR 32 32 5, 6 PCLKA —
000C 01ECh ETHERC Too-short frame receive counter register TSFRCR 32 32 5, 6 PCLKA —
000C 01F0h ETHERC Too-long frame receive counter register TLFRCR 32 32 5, 6 PCLKA —
000C 01F4h ETHERC Residual-bit frame receive counter register RFCR 32 32 5, 6 PCLKA —
000C 01F8h ETHERC Multicast address frame receive counter register MAFCR 32 32 5, 6 PCLKA —
Table 4.1 List of I/O Registers (Address Order) (49/50)
Address
Module
Symbol Register Name
Register
Symbol
Number
of Bits
Access
Size
Number of Access States
Related
Function
ICLKPCLK ICLK<PCLK