Datasheet

ManualsBrandsRENESAS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 144 (20x20) 32-Bit 100 MHz I/O number 117

R01DS0060EJ0160 Rev.1.60 Page 61 of 154

May 19, 2014

RX630 Group 4. I/O Registers

0008 2014h DMAC0 DMA address mode register DMAMD 16 16 2 ICLK DMACA

0008 2018h DMAC0 DMA offset register DMOFR 32 32 2 ICLK

0008 201Ch DMAC0 DMA transfer enable register DMCNT 8 8 2 ICLK

0008 201Dh DMAC0 DMA software start register DMREQ 8 8 2 ICLK

0008 201Eh DMAC0 DMA status register DMSTS 8 8 2 ICLK

0008 201Fh DMAC0 DMA activation source flag control register DMCSL 8 8 2 ICLK

0008 2040h DMAC1 DMA source address register DMSAR 32 32 2 ICLK

0008 2044h DMAC1 DMA destination address register DMDAR 32 32 2 ICLK

0008 2048h DMAC1 DMA transfer count register DMCRA 32 32 2 ICLK

0008 204Ch DMAC1 DMA block transfer count register DMCRB 16 16 2 ICLK

0008 2050h DMAC1 DMA transfer mode register DMTMD 16 16 2 ICLK

0008 2053h DMAC1 DMA interrupt setting register DMINT 8 8 2 ICLK

0008 2054h DMAC1 DMA address mode register DMAMD 16 16 2 ICLK

0008 205Ch DMAC1 DMA transfer enable register DMCNT 8 8 2 ICLK

0008 205Dh DMAC1 DMA software start register DMREQ 8 8 2 ICLK

0008 205Eh DMAC1 DMA status register DMSTS 8 8 2 ICLK

0008 205Fh DMAC1 DMA activation source flag control register DMCSL 8 8 2 ICLK

0008 2080h DMAC2 DMA source address register DMSAR 32 32 2 ICLK

0008 2084h DMAC2 DMA destination address register DMDAR 32 32 2 ICLK

0008 2088h DMAC2 DMA transfer count register DMCRA 32 32 2 ICLK

0008 208Ch DMAC2 DMA block transfer count register DMCRB 16 16 2 ICLK

0008 2090h DMAC2 DMA transfer mode register DMTMD 16 16 2 ICLK

0008 2093h DMAC2 DMA interrupt setting register DMINT 8 8 2 ICLK

0008 2094h DMAC2 DMA address mode register DMAMD 16 16 2 ICLK

0008 209Ch DMAC2 DMA transfer enable register DMCNT 8 8 2 ICLK

0008 209Dh DMAC2 DMA software start register DMREQ 8 8 2 ICLK

0008 209Eh DMAC2 DMA status register DMSTS 8 8 2 ICLK

0008 209Fh DMAC2 DMA activation source flag control register DMCSL 8 8 2 ICLK

0008 20C0h DMAC3 DMA source address register DMSAR 32 32 2 ICLK

0008 20C4h DMAC3 DMA destination address register DMDAR 32 32 2 ICLK

0008 20C8h DMAC3 DMA transfer count register DMCRA 32 32 2 ICLK

0008 20CCh DMAC3 DMA block transfer count register DMCRB 16 16 2 ICLK

0008 20D0h DMAC3 DMA transfer mode register DMTMD 16 16 2 ICLK

0008 20D3h DMAC3 DMA interrupt setting register DMINT 8 8 2 ICLK

0008 20D4h DMAC3 DMA address mode register DMAMD 16 16 2 ICLK

0008 20DCh DMAC3 DMA transfer enable register DMCNT 8 8 2 ICLK

0008 20DDh DMAC3 DMA software start register DMREQ 8 8 2 ICLK

0008 20DEh DMAC3 DMA status register DMSTS 8 8 2 ICLK

0008 20DFh DMAC3 DMA activation source flag control register DMCSL 8 8 2 ICLK

0008 2200h DMAC DMA module activation register DMAST 8 8 2 ICLK

0008 2400h DTC DTC control register DTCCR 8 8 2 ICLK DTCa

0008 2404h DTC DTC vector base register DTCVBR 32 32 2 ICLK

0008 2408h DTC DTC address mode register DTCADMOD 8 8 2 ICLK

0008 240Ch DTC DTC module start register DTCST 8 8 2 ICLK

0008 240Eh DTC DTC status register DTCSTS 16 16 2 ICLK

0008 3002h BSC CS0 mode register CS0MOD 16 16 1, 2 BCLK Buses

0008 3004h BSC CS0 wait control register 1 CS0WCR1 32 32 1, 2 BCLK

0008 3008h BSC CS0 wait control register 2 CS0WCR2 32 32 1, 2 BCLK

0008 3012h BSC CS1 mode register CS1MOD 16 16 1, 2 BCLK

0008 3014h BSC CS1 wait control register 1 CS1WCR1 32 32 1, 2 BCLK

Table 4.1 List of I/O Registers (Address Order) (2/42)

Address

Module

Symbol Register Name

Symbol

Number

of Bits

Access

Size

Number of Access States

Function ICLK PCLK ICLK  PCLK