Datasheet

R01DS0060EJ0160 Rev.1.60 Page 6 of 154
May 19, 2014
RX630 Group 1. Overview
Note 1. Please contact us if you are using a G version.
10-bit A/D converter (ADb)  1 unit (1 unit × 8 channels)
 10-bit resolution
 Conversion time: 1.0 µs per channel (in operation with PCLK at 50 MHz)
 Operating mode
Scan mode (single scan mode or continuous scan mode)
External amplifier connection mode
 Sample-and-hold function
 Three ways to start A/D conversion
Conversion can be started by software, a conversion start trigger from a timer (MTU,
TPU, or TMR), or an external trigger signal.
D/A converter (DAa)  2 channels
 10-bit resolution
 Output voltage: 0 V to VREFH
Temperature sensor  1 channel
 Precision: ± 1 ºC
 The voltage of the temperature is converted into a digital value by the 12-bit A/D
converter.
CRC calculator (CRC)  CRC code generation for arbitrary amounts of data in 8-bit units
 Select any of three generating polynomials:
X
8
+ X
2
+ X + 1, X
16
+ X
15
+ X
2
+ 1, or X
16
+ X
12
+ X
5
+ 1.
 Generation of CRC codes for use with LSB-first or MSB-first communications is
selectable
Unique ID A 16-byte device-specific ID (only for the G version)
Operating frequency Up to 100 MHz
Power supply voltage VCC = AVCC0 = VREFH = VCC_USB = 2.7 to 3.6 V, VREFH0 = 2.7 V to AVCC0, Vbatt =
2.3 to 3.6 V
Operating temperature D version: -40 to +85°C,
G version: -40 to +105°C*
1
Package 177-pin TFLGA (PTLG0177KA-A) (in planning)
176-pin LFBGA (PLBG0176GA-A) (in planning)
176-pin LQFP (PLQP0176KB-A)
145-pin TFLGA (PTLG0145KA-A) (in planning)
144-pin LQFP (PLQP0144KA-A)
100-pin TFLGA (PTLG0100KA-A) (in planning)
100-pin LQFP (PLQP0100KB-A)
80-pin LQFP (PLQP0080KB-A) (in planning)
On-chip debugging system  E1 emulator (JTAG and FINE interfaces)
 E20 emulator (JTAG interface)
Table 1.1 Outline of Specifications (5/5)
Classification Module/Function Description