Datasheet

R01DS0060EJ0160 Rev.1.60 Page 129 of 154
May 19, 2014
RX630 Group 5. Electrical Characteristics
Figure 5.32 RSPI Clock Timing and Simple SPI Clock Timing
Figure 5.33 RSPI Timing (Master, CPHA = 0) and Simple SPI Timing (Master, CKPH = 1)
RSPCKm
Master select
output
t
SPCKWH
V
OH
V
OH
V
OL
V
OL
V
OH
V
OH
t
SPCKWL
t
SPCKr
t
SPCKf
V
OL
t
SPcyc
t
SPCKWH
V
IH
V
IH
V
IL
V
IL
V
IH
V
IH
t
SPCKWL
t
SPCKr
t
SPCKf
V
IL
t
SPcyc
V
OH
= 0.7 × VCC, V
OL
= 0.3 × VCC, V
IH
= 0.7 × VCC, V
IL
= 0.3 × VCC
Simple SPIRSPI
SCKn
Master select
output
RSPCKm
Slave select input
(m = A to C)
SCKn
Slave select input
(n = 0 to 12)
t
Dr,
t
Df
t
SU
t
H
t
LEAD
t
TD
t
LAG
t
SSLr,
t
SSLf
t
OH
t
OD
MSB IN DATA LSB IN MSB IN
MSB OUT DATA LSB OUT IDLE MSB OUT
SSLm0 to SSLm3
output
Simple SPIRSPI
MISOm input SMISOm input
RSPCKm
CPOL = 0
output
SCKn
CKPOL = 0
output
RSPCKm
CPOL = 1
output
SCKn
CKPOL = 1
output
MOSIm input
(m = A to C)
SMOSIm input
(n = 0 to 12)