Datasheet
R01DS0052EJ0140 Rev.1.40 Page 86 of 150
2014.07.16
RX62N Group, RX621 Group 4. I/O Registers
000C 00D4h EDMAC Transmit buffer read address register TBRAR 32 32 4 to 5 ICLK
000C 00D8h EDMAC Transmit descriptor fetch address
register
TDFAR 32 32 4 to 5 ICLK
000C 0100h ETHERC ETHERC mode register ECMR 32 32 4 to 5 ICLK
000C 0108h ETHERC Receive frame length register RFLR 32 32 4 to 5 ICLK
000C 0110h ETHERC ETHERC status register ECSR 32 32 4 to 5 ICLK
000C 0118h ETHERC ETHERC interrupt enable register ECSIPR 32 32 4 to 5 ICLK
000C 0120h ETHERC PHY interface register PIR 32 32 4 to 5 ICLK
000C 0128h ETHERC PHY status register PSR 32 32 4 to 5 ICLK
000C 0140h ETHERC Random number generation counter
upper limit setting register
RDMLR 32 32 4 to 5 ICLK
000C 0150h ETHERC IPG register IPGR 32 32 4 to 5 ICLK
000C 0154h ETHERC Automatic PAUSE frame register APR 32 32 4 to 5 ICLK
000C 0158h ETHERC Manual PAUSE frame register MPR 32 32 4 to 5 ICLK
000C 0160h ETHERC PAUSE frame receive counter register RFCF 32 32 4 to 5 ICLK
000C 0164h ETHERC Automatic PAUSE frame retransmit
count register
TPAUSER 32 32 4 to 5 ICLK
000C 0168h ETHERC PAUSE frame retransmit counter register TPAUSECR 32 32 4 to 5 ICLK
000C 016Ch ETHERC Broadcast frame receive count setting
register
BCFRR 32 32 4 to 5 ICLK
000C 01C0h ETHERC MAC address high register MAHR 32 32 4 to 5 ICLK
000C 01C8h ETHERC MAC address low register MALR 32 32 4 to 5 ICLK
000C 01D0h ETHERC Transmit retry over counter register TROCR 32 32 4 to 5 ICLK
000C 01D4h ETHERC Delayed collision detect counter register CDCR 32 32 4 to 5 ICLK
000C 01D8h ETHERC Lost carrier counter register LCCR 32 32 4 to 5 ICLK
000C 01DCh ETHERC Carrier not detect counter register CNDCR 32 32 4 to 5 ICLK
000C 01E4h ETHERC CRC error frame receive counter register CEFCR 32 32 4 to 5 ICLK
000C 01E8h ETHERC Frame receive error counter register FRECR 32 32 4 to 5 ICLK
000C 01ECh ETHERC Too-short frame receive counter register TSFRCR 32 32 4 to 5 ICLK
000C 01F0h ETHERC Too-long frame receive counter register TLFRCR 32 32 4 to 5 ICLK
000C 01F4h ETHERC Residual-bit frame receive counter
register
RFCR 32 32 4 to 5 ICLK
000C 01F8h ETHERC Multicast address frame receive counter
register
MAFCR 32 32 4 to 5 ICLK
007F C402h FLASH Flash mode register FMODR 8 8 2 to 3 PCLK*
8
007F C410h FLASH Flash access status register FASTAT 8 8 2 to 3 PCLK*
8
007F C411h FLASH Flash access error interrupt enable
register
FAEINT 8 8 2 to 3 PCLK*
8
007F C412h FLASH Flash ready interrupt enable register FRDYIE 8 8 2 to 3 PCLK*
8
007F C440h FLASH Data flash read enable register0 DFLRE0 16 16 2 to 3 PCLK*
8
007F C442h FLASH Data flash read enable register1 DFLRE1 16 16 2 to 3 PCLK*
8
007F C450h FLASH Data flash programming/erasure enable
register0
DFLWE0 16 16 2 to 3 PCLK*
8
007F C452h FLASH Data flash programming/erasure enable
register1
DFLWE1 16 16 2 to 3 PCLK*
8
007F C454h FLASH FCU RAM enable register FCURAME 16 16 2 to 3 PCLK*
8
007F FFB0h FLASH Flash status register 0 FSTATR0 8 8 2 to 3 PCLK*
8
Table 4.1 List of I/O Registers (Address Order) (35 / 36)
Address
Module
Abbreviation Register Name
Register
Abbreviation
Number
of Bits
Access
Size
Number of
Access Cycles