Datasheet

R01DS0052EJ0140 Rev.1.40 Page 76 of 150
2014.07.16
RX62N Group, RX621 Group 4. I/O Registers
0008 8C94h MTU11 Timer control register V TCRV 8 8 2 to 3 PCLK*
8
0008 8C96h MTU11 Timer I/O control register V TIORV 8 8 2 to 3 PCLK*
8
0008 8CA0h MTU11 Timer counter W TCNTW 16 16 2 to 3 PCLK*
8
0008 8CA2h MTU11 Timer general register W TGRW 16 16 2 to 3 PCLK*
8
0008 8CA4h MTU11 Timer control register W TCRW 8 8 2 to 3 PCLK*
8
0008 8CA6h MTU11 Timer I/O control register W TIORW 8 8 2 to 3 PCLK*
8
0008 8CB2h MTU11 Timer interrupt enable register TIER 8 8 2 to 3 PCLK*
8
0008 8CB4h MTU11 Timer start register TSTR 8 8 2 to 3 PCLK*
8
0008 8CB6h MTU11 Timer compare match clear register TCNTCMPCLR 8 8 2 to 3 PCLK*
8
0008 9000h S12AD A/D control register ADCSR 8 8 2 to 3 PCLK*
8
0008 9004h S12AD A/D channel select register ADANS 16 16 2 to 3 PCLK*
8
0008 9008h S12AD A/D-converted value addition mode
select register
ADADS 16 16 2 to 3 PCLK*
8
0008 900Ch S12AD A/D-converted value addition count
select register
ADADC 8 8 2 to 3 PCLK*
8
0008 900Eh S12AD A/D control extended register ADCER 16 16 2 to 3 PCLK*
8
0008 9010h S12AD A/D start trigger select register ADSTRGR 8 8 2 to 3 PCLK*
8
0008 9020h S12AD A/D data register 0 ADDR0 16 16 2 to 3 PCLK*
8
0008 9022h S12AD A/D data register 1 ADDR1 16 16 2 to 3 PCLK*
8
0008 9024h S12AD A/D data register 2 ADDR2 16 16 2 to 3 PCLK*
8
0008 9026h S12AD A/D data register 3 ADDR3 16 16 2 to 3 PCLK*
8
0008 9028h S12AD A/D data register 4 ADDR4 16 16 2 to 3 PCLK*
8
0008 902Ah S12AD A/D data register 5 ADDR5 16 16 2 to 3 PCLK*
8
0008 902Ch S12AD A/D data register 6 ADDR6 16 16 2 to 3 PCLK*
8
0008 902Eh S12AD A/D data register 7 ADDR7 16 16 2 to 3 PCLK*
8
0008 C000h PORT0 Data direction register DDR 8 8 2 to 3 PCLK*
8
0008 C001h PORT1 Data direction register DDR 8 8 2 to 3 PCLK*
8
0008 C002h PORT2 Data direction register DDR 8 8 2 to 3 PCLK*
8
0008 C003h PORT3 Data direction register DDR 8 8 2 to 3 PCLK*
8
0008 C004h PORT4 Data direction register DDR 8 8 2 to 3 PCLK*
8
0008 C005h PORT5 Data direction register DDR 8 8 2 to 3 PCLK*
8
0008 C006h PORT6 Data direction register DDR*
6
*
7
8 8 2 to 3 PCLK*
8
0008 C007h PORT7 Data direction register DDR*
6
*
7
8 8 2 to 3 PCLK*
8
0008 C008h PORT8 Data direction register DDR*
6
*
7
8 8 2 to 3 PCLK*
8
0008 C009h PORT9 Data direction register DDR*
6
*
7
8 8 2 to 3 PCLK*
8
0008 C00Ah PORTA Data direction register DDR 8 8 2 to 3 PCLK*
8
0008 C00Bh PORTB Data direction register DDR 8 8 2 to 3 PCLK*
8
0008 C00Ch PORTC Data direction register DDR 8 8 2 to 3 PCLK*
8
0008 C00Dh PORTD Data direction register DDR 8 8 2 to 3 PCLK*
8
0008 C00Eh PORTE Data direction register DDR*
7
8 8 2 to 3 PCLK*
8
0008 C00Fh PORTF Data direction register DDR*
5
*
6
*
7
8 8 2 to 3 PCLK*
8
0008 C010h PORTG Data direction register DDR*
5
*
6
*
7
8 8 2 to 3 PCLK*
8
0008 C020h PORT0 Data register DR 8 8 2 to 3 PCLK*
8
0008 C021h PORT1 Data register DR 8 8 2 to 3 PCLK*
8
0008 C022h PORT2 Data register DR 8 8 2 to 3 PCLK*
8
Table 4.1 List of I/O Registers (Address Order) (25 / 36)
Address
Module
Abbreviation Register Name
Register
Abbreviation
Number
of Bits
Access
Size
Number of
Access Cycles