Datasheet

R01DS0052EJ0140 Rev.1.40 Page 70 of 150
2014.07.16
RX62N Group, RX621 Group 4. I/O Registers
0008 8310h RIIC0 I
2
C bus bit rate low-level register ICBRL 8 8 2 to 3 PCLK*
8
0008 8311h RIIC0 I
2
C bus bit rate high-level register ICBRH 8 8 2 to 3 PCLK*
8
0008 8312h RIIC0 I
2
C bus transmit data register ICDRT 8 8 2 to 3 PCLK*
8
0008 8313h RIIC0 I
2
C bus receive data register ICDRR 8 8 2 to 3 PCLK*
8
0008 8320h RIIC1 I
2
C bus control register 1 ICCR1 8 8 2 to 3 PCLK*
8
0008 8321h RIIC1 I
2
C bus control register 2 ICCR2 8 8 2 to 3 PCLK*
8
0008 8322h RIIC1 I
2
C bus mode register 1 ICMR1 8 8 2 to 3 PCLK*
8
0008 8323h RIIC1 I
2
C bus mode register 2 ICMR2 8 8 2 to 3 PCLK*
8
0008 8324h RIIC1 I
2
C bus mode register 3 ICMR3 8 8 2 to 3 PCLK*
8
0008 8325h RIIC1 I
2
C bus function enable register ICFER 8 8 2 to 3 PCLK*
8
0008 8326h RIIC1 I
2
C bus status enable register ICSER 8 8 2 to 3 PCLK*
8
0008 8327h RIIC1 I
2
C bus interrupt enable register ICIER 8 8 2 to 3 PCLK*
8
0008 8328h RIIC1 I
2
C bus status register 1 ICSR1 8 8 2 to 3 PCLK*
8
0008 8329h RIIC1 I
2
C bus status register 2 ICSR2 8 8 2 to 3 PCLK*
8
0008 832Ah RIIC1 Slave address register L0 SARL0 8 8 2 to 3 PCLK*
8
0008 832Ah RIIC1 Timeout internal counter TMOCNT 16 16 2 to 3 PCLK*
8
0008 832Ah RIIC1 Timeout internal counter L TMOCNTL 8 8 2 to 3 PCLK*
8
0008 832Bh RIIC1 Slave address register U0 SARU0 8 8 2 to 3 PCLK*
8
0008 832Bh RIIC1 Timeout internal counter U TMOCNTU 8 2 to 3 PCLK*
8
0008 832Ch RIIC1 Slave address register L1 SARL1 8 8 2 to 3 PCLK*
8
0008 832Dh RIIC1 Slave address register U1 SARU1 8 8 2 to 3 PCLK*
8
0008 832Eh RIIC1 Slave address register L2 SARL2 8 8 2 to 3 PCLK*
8
0008 832Fh RIIC1 Slave address register U2 SARU2 8 8 2 to 3 PCLK*
8
0008 8330h RIIC1 I
2
C bus bit rate low-level register ICBRL 8 8 2 to 3 PCLK*
8
0008 8331h RIIC1 I
2
C bus bit rate high-level register ICBRH 8 8 2 to 3 PCLK*
8
0008 8332h RIIC1 I
2
C bus transmit data register ICDRT 8 8 2 to 3 PCLK*
8
0008 8333h RIIC1 I
2
C bus receive data register ICDRR 8 8 2 to 3 PCLK*
8
0008 8380h RSPI0 RSPI control register SPCR 8 8 2 to 3 PCLK*
8
0008 8381h RSPI0 RSPI slave select polarity register SSLP 8 8 2 to 3 PCLK*
8
0008 8382h RSPI0 RSPI pin control register SPPCR 8 8 2 to 3 PCLK*
8
0008 8383h RSPI0 RSPI status register SPSR 8 8 2 to 3 PCLK*
8
0008 8384h RSPI0 RSPI data register SPDR 32 16, 32 2 to 3 PCLK*
8
0008 8388h RSPI0 RSPI sequence control register SPSCR 8 8 2 to 3 PCLK*
8
0008 8389h RSPI0 RSPI sequence status register SPSSR 8 8 2 to 3 PCLK*
8
0008 838Ah RSPI0 RSPI bit rate register SPBR 8 8 2 to 3 PCLK*
8
0008 838Bh RSPI0 RSPI data control register SPDCR 8 8 2 to 3 PCLK*
8
0008 838Ch RSPI0 RSPI clock delay register SPCKD 8 8 2 to 3 PCLK*
8
0008 838Dh RSPI0 RSPI slave select negation delay register SSLND 8 8 2 to 3 PCLK*
8
0008 838Eh RSPI0 RSPI next-access delay register SPND 8 8 2 to 3 PCLK*
8
0008 838Fh RSPI0 RSPI control register 2 SPCR2 8 8 2 to 3 PCLK*
8
0008 8390h RSPI0 RSPI command register 0 SPCMD0 16 16 2 to 3 PCLK*
8
0008 8392h RSPI0 RSPI command register 1 SPCMD1 16 16 2 to 3 PCLK*
8
0008 8394h RSPI0 RSPI command register 2 SPCMD2 16 16 2 to 3 PCLK*
8
0008 8396h RSPI0 RSPI command register 3 SPCMD3 16 16 2 to 3 PCLK*
8
0008 8398h RSPI0 RSPI command register 4 SPCMD4 16 16 2 to 3 PCLK*
8
Table 4.1 List of I/O Registers (Address Order) (19 / 36)
Address
Module
Abbreviation Register Name
Register
Abbreviation
Number
of Bits
Access
Size
Number of
Access Cycles