Datasheet

R01DS0052EJ0140 Rev.1.40 Page 51 of 150
2014.07.16
RX62N Group, RX621 Group 3. Address Space
3.2 External Address Space
The external address space is classified into CS areas (CS0 to CS7) and SDRAM area (SDCS).
The CS area is divided into up to 8 areas (CS0 to CS7), each corresponding to the CSi# signal output from a CSi# (i = 0
to 7) pin.
Figure 3.2 shows the address ranges corresponding to the individual CS areas (CS0 to CS7) and SDRAM area (SDCS)
in on-chip ROM disabled extended mode.
Figure 3.2 Correspondence between External Address Spaces, CS Areas (CS0 to CS7),
and SDRAM area (SDCS) (In On-Chip ROM Disabled Extended Mode)
0000 0000h
0008 0000h
On-chip RAM
External address space
(CS area)
Reserved area
*
1
0010 0000h
Peripheral I/O registers
0100 0000h
0800 0000h
FF00 0000h
Reserved area
*
1
0001 8000h
Reserved area
*
1
External address space
*
2
(CS area)
0100 0000h
0200 0000h
0300 0000h
0400 0000h
0500 0000h
0600 0000h
0700 0000h
CS7 (16 Mbytes)
01FF FFFFh
02FF FFFFh
03FF FFFFh
04FF FFFFh
05FF FFFFh
06FF FFFFh
07FF FFFFh
CS6 (16 Mbytes)
CS5 (16 Mbytes)
CS4 (16 Mbytes)
CS3 (16 Mbytes)
CS2 (16 Mbytes)
CS1 (16 Mbytes)
FFFF FFFFh
FFFF FFFFh
FF00 0000h
CS0 (16 Mbytes)
Note 1. Reserved areas should not be accessed, since the correct operation of LSI is not guaranteed
if they are accessed.
Note 2. The CS0 area is disabled in on-chip ROM enabled extended mode.
In this mode, the address space for addresses above 1000 0000h is as shown in figure 4.1.
External address space
(SDRAM area)
1000 0000h
0FFF FFFFh
0800 0000h
SDCS (128 Mbytes)