Datasheet

R01DS0052EJ0140 Rev.1.40 Page 37 of 150
2014.07.16
RX62N Group, RX621 Group 1. Overview
Table 1.8 List of Pins and Pin Functions (85-Pin TFLGA) (1 / 3)
Pin No. Power
Supply
Clock
System
Control I/O Port
External
Bus USB
Timers
(MTU, TMR, PPG)
Communi-
cation
(SCI, CAN, RSPI, RIIC) Others
85-Pin
TFLGA
A1 P05 DA1/
IRQ13-
A
A2 AVCC
A3 VREFL
A4 P43 IRQ11-
B/AN3
A5 P47 IRQ15/
AN7
A6 PD1 D1
A7 PD4 D4 MTIC11U
A8 PD5 D5 MTIC5W
A9 PD7 D7 MTIC5U
A10 PD6 D6 MTIC5V
B1 VCC
B2 AVSS
B3 VREFH
B4 P42 IRQ10/
AN2
B5 P46 IRQ14/
AN6
B6 PD0 D0
B7 PD2 D2 MTIC11W
B8 PD3 D3 MTIC11V
B9 PA3 A3 MTIOC6D/PO19
B10 PA1 A1 MTIOC6B/PO17 SSLA2
C1 P03 IRQ11-
A/DA0
C2 VSS
C3 P40 IRQ8/
AN0
C4 P41 IRQ9/
AN1
C5 P44 IRQ12/
AN4
C6 P45 IRQ13-
B/AN5
C7 MD1
C8 BSCANP
C9 PA5 A5 MTIOC7B/PO21 RSPCKA
C10 PA0 A0 MTIOC6A/PO16 SSLA1
D1 MDE
D2 EMLE
D3 MD0
D4 RES#