Datasheet
R01DS0052EJ0140 Rev.1.40 Page 139 of 150
2014.07.16
RX62N Group, RX621 Group 5. Electrical Characteristics
5.8 Oscillation Stop Detection Timing
Figure 5.66 Oscillation Stop Detection Timing
Table 5.24
Oscillation Stop Detection Circuit Characteristics
Conditions: VCC = PLLVCC = AVCC = VCC_USB = 2.7 to 3.6 V, VREFH = 2.7 V to AVCC
VSS = PLLVSS = AVSS = VREFL = VSS_USB = 0 V
T
a
= -40 to +85C
Item Symbol Min. Typ. Max. Unit Test Conditions
Detection time tdr — — 1.0 ms Figure 5.66
Internal oscillation frequency when oscillation
stop is detected
f
MAIN
0.5 — 7.0 MHz
ICLK
Main clock oscillator
Internal oscillation
Nomal operation Abnomal operation
OSTDF*
Note : * This indicates the OSTDF flag in the oscillation detection control register (OSTDCR).
t
dr