Datasheet

R01DS0052EJ0140 Rev.1.40 Page 137 of 150
2014.07.16
RX62N Group, RX621 Group 5. Electrical Characteristics
5.7 Power-on Reset Circuit, Voltage Detection Circuit Characteristics
Note 1. The power-off time indicates the time when VCC is below the minimum value of voltage detection levels V
POR
, Vdet1, and Vdet2
for the POR/ LVD.
Figure 5.63 Power-on Reset Timing
Figure 5.64 Voltage Detection Circuit Timing (Vdet1)
Table 5.23
Power-on Reset Circuit, Voltage Detection Circuit Characteristics
Conditions: VCC = PLLVCC = AVCC = VCC_USB = 2.7 to 3.6 V, VREFH = 2.7 V to AVCC
VSS = PLLVSS = AVSS = VREFL = VSS_USB = 0 V
T
a
= -40 to +85C
Item Symbol Min. Typ. Max. Unit Test Conditions
Voltage
detection level
Power-on reset (POR) V
POR
2.48 2.58 2.68 V Figure 5.63
Voltage detection circuit (LVD) Vdet1 2.75 2.85 2.95 Figure 5.64 and
Figure 5.65
Vdet2 3.05 3.15 3.25
Internal reset time t
POR
20 35 50 ms
Min. VCC down time
*1
t
VOFF
200 — — µs Figure 5.64 and
Figure 5.65
Reply delay time tdet — — 200 µs
Internal reset signal
(low valid)
VCC
t
VOFF
V
POR
t
POR
t
POR
t
det
VCC
Vdet1
t
VOFF
t
POR
t
det
Internal reset signal
(low valid)