Datasheet

R01DS0052EJ0140 Rev.1.40 Page 107 of 150
2014.07.16
RX62N Group, RX621 Group 5. Electrical Characteristics
Figure 5.17 SDRAM Space Multiple Read Bus Timing
SDCLK
Note 1: Address pins for output of the precharge-setting command (Precharge-sel) for SDRAM.
ACT RD RD RD RD PRA
A18 to A0
t
AD2
t
AD2
t
AD2
t
AD2
t
AD2
t
AD2
t
AD2
t
AD2
AP*
1
SDCS#
RAS#
CAS#
WE#
CKE
DQMn
D31 to D0
C1 C2 C3
Row
Address
C0
(Column Address)
t
AD2
t
AD2
t
AD2
t
AD2
t
AD2
t
CSD2
t
CSD2
t
CSD2
t
CSD2
t
CSD2
t
RASD
t
RASD
t
RASD
t
RASD
t
RASD
t
CASD
t
CASD
t
CASD
t
WED
t
WED
(High)
t
DQMD
t
DQMD
t
RDS2
t
RDH2
t
RDS2
t
RDH2
PRA
command