Datasheet

RX610 Group REVISION HISTORY
R01DS0097EJ0120 Rev.1.20 Page 84 of 84
Feb 20, 2013
REVISION HISTORY
RX610 Group Datasheet
Rev.
Data
Description
Page
Summary
0.50
Mar. 24, 2009
−
First edition issued
1.00 Apr. 22, 2011
6
7
10 to 15
21, 25
1. Overview
Figure 1.2 Block Diagram: Ports F to H added
Figure 1.3 Pin Assignment of the 176-pin LFBGA, added
Table 1.3 List of Pins and Pin Functions (176-Pin LFBGA), added
Table 1.5 Pin Functions:
Description on the BSCANP, PF0 to PF6, PG0 to PG7, and PH0 to PH7 pins added
34 to 54
4. I/O Registers
Table 4.1 List of I/O Registers (Address Order), changed
58
59
60
61
71
75
75
76
5. Electrical Characteristics
Table 5.3 Permissible Output Currents, changed
Table 5.5 Clock Timing: Oscillation settling time after leaving deep software standby mode
(crystal), t
OSC3,
added
Figure 5.2 Oscillation Settling Timing after Software Standby Mode, changed
Figure 5.3 Oscillation Settling Timing after Deep Software Standby Mode, added
Table 5.8 Timing of On-Chip Peripheral Modules (3), changed
Figure 5.26 Boundary Scan TCK Timing, added
Figure 5.27 Boundary Scan TRST# Timing, added
Figure 5.28 Boundary Scan Input/Output Timing, added
1.20 Feb.20, 2013
5
23, 26
1. Overview
Table 1.2 List of Products, product lineup added
Table 1.5 Pin Functions, description on bus control changed, note added
35 to 55
5. I/O register
Table 5.1 List of I/O Registers (Address Order), changed
All trademarks and registered trademarks are the property of their respective owners.