Datasheet

RX610 Group 1. Overview
R01DS0097EJ0120 Rev.1.20 Page 2 of 84
Feb 20, 2013
1.1.2 Outline of Specifications
Table 1.1 lists the specifications of the RX610 Group in outline.
Table 1.1 Outline of Specifications
Classification
Module/Function
Description
CPU CPU Maximum operating frequency: 100 MHz
32-bit RX CPU
Minimum instruction execution time: One instruction in one state (in one system clock
cycle)
Address space: 4-Gbyte linear address
Register set of the CPU
General purpose: Sixteen 32-bit registers
Control: Nine 32-bit registers
Accumulator: One 64-bit register
Basic instructions: 73
Floating-point operation instructions: 8
DSP instructions: 9
Addressing modes: 10
Data arrangement
Instructions: Little endian
Data: Selectable as little endian or big endian
On-chip 32-bit multiplier: 32 x 32 64 bits
On-chip divider: 32 / 32 32 bits
Barrel shifter: 32 bits
FPU Single precision (32-bit) floating point
Data types and floating-point exceptions conforming to the IEEE754 standard
Memory Flash Flash capacity: 2 Mbytes (max.)
Three types of on-board programming modes
SCI boot mode, user program mode, and user boot mode
RAM RAM capacity: 128 Kbytes
Data flash
Data flash capacity: 32 Kbytes
MCU operating modes Single-chip mode, on-chip ROM enabled extended mode, and on-chip ROM disabled
extended mode
Clock Clock generation circuit One main clock oscillation circuit
Includes a PLL circuit and frequency divider, so the operating frequency is selectable
System clock, peripheral module clock, and external bus clock are independently
specifiable.
The CPU, DMAC, DTC, ROM, and RAM run in synchronization with the system
clock (ICLK): 8 to 100 MHz
Peripheral modules run in synchronization with the peripheral module
clock (PCLK): 8 to 50 MHz
Devices connected to the external bus run in synchronization with the external bus
clock (BCLK): 8 to 25 MHz
Power down Power-down function Module stop function
Four power-down modes
Sleep mode, all-module clock stop mode, software standby mode, and deep software
standby mode