Datasheet

RX610 Group 5. Electrical Characteristics
R01DS0097EJ0120 Rev.1.20 Page 64 of 84
Feb 20, 2013
5.3.2 Control Signal Timing
Table 5.6 Control Signal Timing
Conditions: V
CC
= PLLV
CC
= AV
CC
= 3.0 to 3.6 V, V
REFH
= 3.0 V to AV
CC
, V
SS
= PLLV
SS
= V
REFL
= 0 V
ICLK = 8 to 100 MHz, BCLK = 8 to 25 MHz
T
a
= -20 to +85°C (regular specifications), T
a
= -40 to +85°C (wide-range specifications)
Item
Symbol
Min.
Max.
Unit
Test
Conditions
RES# pulse width (except for ROM, data flash
programming/erasure)
t
RESW
*
1
20  t
cyc
Figure 5.6
1.5  µs
Internal reset time (during ROM, data flash
programming/erasure)
t
RESW2
*
2
35  µs
NMI pulse width t
NMIW
200  ns
Figure 5.7
IRQ pulse width t
IRQW
200  ns
Figure 5.8
Notes: 1. Both the time and the number of cycles should satisfy the specifications.
2. This is to specify the FCU reset and the WDT reset.
RES#
t
RESW
Figure 5.6 Reset Input Timing
NMI
t
NMIW
Figure 5.7 NMI Interrupt Input Timing
Note: * SSIER must be set to cancel software standby mode.
IRQ
t
IRQW
Figure 5.8 IRQ Interrupt Input Timing