Datasheet

R01DS0031EJ0210 Rev.2.10 Page 97 of 111
Jul 31, 2012
M16C/65 Group 5. Electrical Characteristics
V
CC1
= V
CC2
= 3 V
Timing Requirements
(V
CC1
= V
CC2
= 3 V, V
SS
= 0 V, at T
opr
= -20°C to 85°C/-40°C to 85°C unless otherwise specified)
5.3.3 Timing Requirements (Memory Expansion Mode and Microprocessor
Mode)
Notes:
1. Calculated according to the BCLK frequency as follows:
2. Calculated according to the BCLK frequency as follows:
n is 1 for 1 wait setting, 2 for 2 waits setting and 3 for 3 waits setting.
3. Calculated according to the BCLK frequency as follows:
n is 2 for 2 waits setting, 3 for 3 waits setting.
4. Calculated according to the BCLK frequency as follows:
n is 3 for 2
φ + 3 φ, 4 for 2 φ + 4 φ, 4 for 3 φ + 4 φ, 5 for 4 φ + 5 φ,.
Table 5.60 Memory Expansion Mode and Microprocessor Mode
Symbol Parameter
Standard
Unit
Min. Max.
t
ac1(RD-DB)
Data input access time (for setting with no wait)
(Note 1) ns
t
ac2(RD-DB)
Data input access time (for setting with wait)
(Note 2) ns
t
ac3(RD-DB)
Data input access time (when accessing multiplex bus area)
(Note 3) ns
t
ac4(RD-DB)
Data input access time (for setting with 2 φ + 3 φ or more)
(Note 4) ns
t
su(DB-RD)
Data input setup time
50 ns
t
su(RDY-BCLK)
RDY input setup time
85 ns
t
h(RD-DB)
Data input hold time
0ns
t
h(BCLK-RDY)
RDY input hold time
0ns
0.5 10
9
×
f
BCLK()
----------------------60ns[]–
n 0.5+()10
9
×
f
BCLK()
------------------------------------ 6 0 ns[]–
n 0.5–()10
9
×
f
BCLK()
------------------------------------60ns[]–
n 10
9
×
f
BCLK()
------------------60ns[]–