Datasheet

R01DS0031EJ0210 Rev.2.10 Page 9 of 111
Jul 31, 2012
M16C/65 Group 1. Overview
1.4 Block Diagram
Figure 1.3 to Figure 1.4 show block diagrams.
Figure 1.3 Block Diagram for the 128-Pin Package
DMAC
(4 channels)
Internal peripheral functions
UART or
clock synchronous serial I/O
(6 channels)
System clock generator
XIN-XOUT
XCIN-XCOUT
PLL frequency synthesizer
On-chip oscillator (125 kHz)
High-speed on-chip oscillator
Clock synchronous serial I/O
(8 bit x 2 channels)
Notes:
1. ROM size depends on MCU type.
2. RAM size depends on MCU type.
8 8 8 8 8 8
Port P5Port P4Port P3Port P2Port P1Port P0
VCC2 ports
M16C/60 Series CPU core
R1H R1L
R0H R0L
R3
R2
A0
A1
FB
Multiplier
ROM
(1)
Memory
RAM
(2)
SB
ISP
USP
INTB
PC
FLG
CRC arithmetic circuit
(CRC-CCITT or CRC-16)
Three-phase
motor control circuit
Timer (16 bit)
Outputs (timer A): 5
Inputs (timer B): 6
VCC1 ports
Real-time clock
PWM function (8 bit x 2)
Remote control signal
receiver (2 circuits)
Watchdog timer
(15 bit)
A/D converter
(10-bit resolution x 26
channels)
D/A converter
(8-bit resolution x 2
circuits)
Multi-master I
2
C-bus interface
(1 channel)
CEC function
8 8
Port P13Port P12
Port P7Port P8Port P9 Port P6
2
Port P14 Port P11 Port P10
8 8 8 8 8 8
On-chip debugger
Voltage detector
Power-on reset