Datasheet

ManualsBrandsRENESAS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 128 (14x20) 16-Bit 32 MHz I/O number 111

R01DS0031EJ0210 Rev.2.10 Page 1 of 111

Jul 31, 2012

M16C/65 Group

RENESAS MCU

R01DS0031EJ0210

Rev.2.10

Jul 31, 2012

Datasheet

1. Overview

1.1 Features

The M16C/65 Group microcomputer (MCU) incorporates the M16C/60 Series CPU core and flash

memory, employing sophisticated instructions for a high level of efficiency. This MCU has 1 MB of address

space (expandable to 4 MB), and it is capable of executing instructions at high speed. In addition, the

CPU core boasts a multiplier for high-speed operation processing.

This MCU consumes low power, and supports operating modes that allow additional power control. The

MCU also uses an anti-noise configuration to reduce emissions of electromagnetic noise and is designed

to withstand electromagnetic interference (EMI). By integrating many of the peripheral functions, including

the multifunction timer and serial interface, the number of system components has been reduced.

1.1.1 Applications

This MCU can be used in audio components, cameras, televisions, household appliances, office

equipment, communication devices, mobile devices, industrial equipment, and other applications.

Summary of content (115 pages)

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Datasheet M16C/65 Group RENESAS MCU 1. R01DS0031EJ0210 Rev.2.10 Jul 31, 2012 Overview 1.1 Features The M16C/65 Group microcomputer (MCU) incorporates the M16C/60 Series CPU core and flash memory, employing sophisticated instructions for a high level of efficiency. This MCU has 1 MB of address space (expandable to 4 MB), and it is capable of executing instructions at high speed. In addition, the CPU core boasts a multiplier for high-speed operation processing.
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M16C/65 Group 1.2 1. Overview Specifications The M16C/65 Group includes 128-pin and 100-pin packages. Table 1.1 to Table 1.4 list specifications. Table 1.1 Specifications for the 128-Pin Package (1/2) Item Function Description CPU Central processing unit M16C/60 Series core (multiplier: 16 bit × 16 bit 32 bit, multiply and accumulate instruction: 16 bit × 16 bit + 32 bit 32 bit) • Number of basic instructions: 91 • Minimum instruction execution time: 31.
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M16C/65 Group 1. Overview Table 1.
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M16C/65 Group Table 1.3 1. Overview Specifications for the 100-Pin Package (1/2) Item Function Description CPU Central processing unit M16C/60 Series core (multiplier: 16 bit × 16 bit 32 bit, multiply and accumulate instruction: 16 bit × 16 bit + 32 bit 32 bit) • Number of basic instructions: 91 • Minimum instruction execution time: 31.25 ns (f(BCLK) = 32 MHz, VCC1 = VCC2 = 2.7 to 5.
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M16C/65 Group 1. Overview Table 1.
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M16C/65 Group 1.3 1. Overview Product List Table 1.5 and Table 1.6 list product information. Figure 1.1 shows the Part No., with Memory Size and Package, and Figure 1.2 shows the Marking Diagram (Top View). Table 1.5 Product List (1/2) Part No.
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M16C/65 Group Table 1.6 1. Overview Product List (2/2) Part No.
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M16C/65 Group 1. Overview Part No.
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M16C/65 Group 1.4 1. Overview Block Diagram Figure 1.3 to Figure 1.4 show block diagrams.
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M16C/65 Group 1.
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VREF AVCC P9_7/ADTRG/SIN4 P9_6/ANEX1/SOUT4 P9_5/ANEX0/CLK4 P9_4/DA1/TB4IN/PWM1 P9_3/DA0/TB3IN/PWM0 P9_2/TB2IN/PMC0/SOUT3 P9_1/TB1IN/PMC1/SIN3 P9_0/TB0IN/CLK3 P14_1 P14_0 BYTE CNVSS P8_7/XCIN P8_6/XCOUT RESET XOUT VSS XIN VCC1 P8_5/NMI/SD/CEC (1) P8_4/INT2/ZP P8_3/INT1 P8_2/INT0 P8_1/TA4IN/U/CTS5/RTS5 P8_0/TA4OUT/U/RXD5/SCL5 P7_7/TA3IN/CLK5 P7_6/TA3OUT/TXD5/SDA5 P7_5/TA2IN/W P7_4/TA2OUT/W P7_3/CTS2/RTS2/TA1IN/V P7_2/CLK2/TA1OUT/V P7_1/RXD2/SCL2/SCLMM/TA0IN/TB5IN (1) P7_0/TXD2/SDA2/SDAMM/TA0OUT (1) P6_7/TXD1/
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M16C/65 Group Table 1.7 1. Overview Pin Names for the 128-Pin Package (1/3) I/O Pin for Peripheral Function Pin No.
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M16C/65 Group Table 1.8 Pin No. 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 1.
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M16C/65 Group Table 1.9 Pin No. 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 Control Pin 1.
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P9_6/ANEX1/SOUT4 P9_5/ANEX0/CLK4 P9_4/DA1/TB4IN/PWM1 P9_3/DA0/TB3IN/PWM0 P9_2/TB2IN/PMC0/SOUT3 P9_1/TB1IN/PMC1/SIN3 P9_0/TB0IN/CLK3 BYTE CNVSS P8_7/XCIN P8_6/XCOUT RESET XOUT VSS XIN VCC1 P8_5/NMI/SD/CEC (1) P8_4/INT2/ZP P8_3/INT1 P8_2/INT0 P8_1/TA4IN/U/CTS5/RTS5 P8_0/TA4OUT/U/RXD5/SCL5 P7_7/TA3IN/CLK5 P7_6/TA3OUT/TXD5/SDA5 P7_5/TA2IN/W P7_4/TA2OUT/W P7_3/CTS2/RTS2/TA1IN/V P7_2/CLK2/TA1OUT/V P7_1/RXD2/SCL2/SCLMM/TA0IN/TB5IN (1) P7_0/TXD2/SDA2/SDAMM/TA0OUT (1) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
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M16C/65 Group 1.
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M16C/65 Group Table 1.10 1. Overview Pin Names for the 100-Pin Package (1/2) Pin No.
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M16C/65 Group Table 1.11 Pin No. FA 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 FB 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 1.
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M16C/65 Group 1.6 1. Overview Pin Functions Table 1.12 Pin Functions for the 128-Pin Package (1/3) Signal Name Pin Name I/O Power Supply Description Power supply input VCC1, VCC2, VSS I - Apply 2.7 to 5.5 V to pins VCC1 and VCC2 (VCC1 ≥ VCC2), and 0 V to the VSS pin. Analog power supply input AVCC, AVSS I VCC1 This is the power supply for the A/D and D/A converters. Connect the AVCC pin to VCC1, and connect the AVSS pin to VSS.
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M16C/65 Group Table 1.13 1. Overview Pin Functions for the 128-Pin Package (2/3) Signal Name Pin Name I/O Power Supply Description XIN I VCC1 Main clock output XOUT O VCC1 I/O for the main clock oscillator. Connect a ceramic resonator or crystal between pins XIN and XOUT. (1) Input an external clock to XIN pin and leave XOUT pin open. Sub clock input XCIN I VCC1 XCOUT O VCC1 I/O for a sub clock oscillator. Connect a crystal between pins XCIN and XCOUT.
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M16C/65 Group Table 1.14 1. Overview Pin Functions for the 128-Pin Package (3/3) Signal Name Pin Name I/O Power Supply SDA0 to SDA2, SDA5 I/O VCC1 SDA6, SDA7 I/O VCC2 SCL0 to SCL2, SCL5 I/O VCC1 SCL6, SCL7 I/O VCC2 CLK3, CLK4 I/O VCC1 Transmit/receive clock I/O. SIN3, SIN4 I VCC1 Serial data input. SOUT3, SOUT4 O VCC1 Serial data output. SDAMM I/O VCC1 Serial data I/O (N-channel open drain output).
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M16C/65 Group Table 1.15 1. Overview Pin Functions for the 100-Pin Package (1/3) Signal Name Pin Name I/O Power Supply Description Power supply input VCC1, VCC2, VSS I - Apply 2.7 to 5.5 V to pins VCC1 and VCC2 (VCC1 ≥ VCC2) and 0 V to the VSS pin. Analog power supply input AVCC, AVSS I VCC1 This is the power supply for the A/D and D/A converters. Connect the AVCC pin to VCC1, and connect the AVSS pin to VSS. RESET I VCC1 Driving this pin low resets the MCU.
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M16C/65 Group Table 1.16 1. Overview Pin Functions for the 100-Pin Package (2/3) Signal Name Pin Name I/O Power Supply Description I/O for the main clock oscillator. Connect a ceramic resonator or crystal between pins XIN and XOUT. (1) Input an external clock to XIN pin and leave XOUT pin open. Main clock input XIN I VCC1 Main clock output XOUT O VCC1 Sub clock input XCIN I VCC1 XCOUT O VCC1 I/O for a sub clock oscillator. Connect a crystal between XCIN pin and XCOUT pin.
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M16C/65 Group Table 1.17 Signal Name 1. Overview Pin Functions for the 100-Pin Package (3/3) Pin Name I/O Power Supply SDA0 to SDA2, SDA5 I/O VCC1 SDA6, SDA7 I/O VCC2 SCL0 to SCL2, SCL5 I/O VCC1 SCL6, SCL7 I/O VCC2 CLK3, CLK4 I/O VCC1 Transmit/receive clock I/O. SIN3, SIN4 I VCC1 Serial data input. SOUT3, SOUT4 O VCC1 Serial data output. SDAMM I/O VCC1 Serial data I/O (N-channel open drain output). SCLMM I/O VCC1 Transmit/receive clock I/O (N-channel open drain output).
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M16C/65 Group 2. 2. Central Processing Unit (CPU) Central Processing Unit (CPU) Figure 2.1 shows the CPU registers. Seven registers (R0, R1, R2, R3, A0, A1, and FB) out of 13 compose a register bank, and there are two register banks.
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M16C/65 Group 2.1 2. Central Processing Unit (CPU) Data Registers (R0, R1, R2, and R3) R0, R1, R2, and R3 are 16-bit registers used for transfer, arithmetic, and logic operations. R0 and R1 can be split into upper (R0H/R1H) and lower (R0L/R1L) bits to be used separately as 8-bit data registers. R0 can be combined with R2, and R3 can be combined with R1 and be used as 32-bit data registers R2R0 and R3R1, respectively. 2.
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M16C/65 Group 2.8.7 2. Central Processing Unit (CPU) Interrupt Enable Flag (I Flag) The I flag enables maskable interrupts. Maskable interrupts are disabled when the I flag is 0, and enabled when it is 1. The I flag becomes 0 when an interrupt request is accepted. 2.8.8 Stack Pointer Select Flag (U Flag) ISP is selected when the U flag is 0. USP is selected when the U flag is 1.
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M16C/65 Group 3. 3.1 3. Address Space Address Space Address Space The M16C/65 Group has a 1 MB address space from 00000h to FFFFFh. Address space is expandable to 4 MB with the memory area expansion function. Addresses 40000h to BFFFFh can be used as external areas from bank 0 to bank 7. Figure 3.1 shows the Address Space. Areas that can be accessed vary depending on processor mode and the status of each control bit.
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M16C/65 Group 3.2 3. Address Space Memory Map Special function registers (SFRs) are allocated from address 00000h to 003FFh and from 0D000h to 0D7FFh. Peripheral function control registers are located here. All blank areas within SFRs are reserved. Do not access these areas. Internal RAM is allocated from address 00400h and higher, with 10 KB of internal RAM allocated from 00400h to 02BFFh.
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M16C/65 Group 3.3 3. Address Space Accessible Area in Each Mode Areas that can be accessed vary depending on processor mode and the status of each control bit. Figure 3.3 shows the Accessible Area in Each Mode. In single-chip mode, the SFRs, internal RAM, and internal ROM can be accessed. In memory expansion mode, the SFRs, internal RAM, internal ROM, and external areas can be accessed. Address space is expandable to 4 MB with the memory area expansion function.
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M16C/65 Group 4. 4. Special Function Registers (SFRs) Special Function Registers (SFRs) 4.1 SFRs An SFR is a control register for a peripheral function. Table 4.
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M16C/65 Group Table 4.2 Address 0020h 0021h 0022h 0023h 0024h 0025h 0026h 0027h 0028h 0029h 002Ah 002Bh 002Ch 002Dh 002Eh 002Fh 0030h 0031h 0032h 0033h 0034h 0035h 0036h 0037h 0038h 0039h 003Ah 003Bh 003Ch 003Dh 003Eh 003Fh 4.
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M16C/65 Group Table 4.3 4.
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M16C/65 Group Table 4.4 Address 0060h 0061h 0062h 0063h 0064h 0065h 0066h 0067h 0068h 0069h 006Ah 006Bh 006Ch 006Dh 006Eh 006Fh 0070h 0071h 0072h 0073h 0074h 0075h 0076h 0077h 0078h 0079h 007Ah 007Bh 007Ch 007Dh 007Eh 007Fh 0080h to 017Fh 4.
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M16C/65 Group Table 4.5 Address 0180h 0181h 0182h 0183h 0184h 0185h 0186h 0187h 0188h 0189h 018Ah 018Bh 018Ch 018Dh 018Eh 018Fh 0190h 0191h 0192h 0193h 0194h 0195h 0196h 0197h 0198h 0199h 019Ah 019Bh 019Ch 019Dh 019Eh 019Fh 01A0h 01A1h 01A2h 01A3h 01A4h 01A5h 01A6h 01A7h 01A8h 01A9h 01AAh 01ABh 01ACh 01ADh 01AEh 01AFh 4.
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M16C/65 Group Table 4.6 Address 01B0h 01B1h 01B2h 01B3h 01B4h 01B5h 01B6h 01B7h 01B8h 01B9h 01BAh 01BBh 01BCh 01BDh 01BEh 01BFh 01C0h 01C1h 01C2h 01C3h 01C4h 01C5h 01C6h 01C7h 01C8h 01C9h 01CAh 01CBh 01CCh 01CDh 01CEh 01CFh 01D0h 01D1h 01D2h 01D3h 01D4h 01D5h 01D6h 01D7h 01D8h 01D9h 01DAh 01DBh 01DCh 01DDh 01DEh 01DFh 4.
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M16C/65 Group Table 4.7 4. Special Function Registers (SFRs) SFR Information (7) (1) Address 01E0h 01E1h 01E2h 01E3h 01E4h 01E5h 01E6h 01E7h 01E8h 01E9h 01EAh 01EBh 01ECh 01EDh 01EEh 01EFh 01F0h 01F1h 01F2h 01F3h 01F4h 01F5h 01F6h 01F7h 01F8h 01F9h 01FAh 01FBh 01FCh 01FDh 01FEh 01FFh 0200h 0201h 0202h 0203h 0204h 0205h 0206h 0207h 0208h 0209h 020Ah 020Bh 020Ch 020Dh 020Eh 020Fh Note: 1.
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M16C/65 Group Table 4.8 4.
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M16C/65 Group Table 4.9 4.
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M16C/65 Group Table 4.10 4.
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M16C/65 Group Table 4.11 4.
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M16C/65 Group Table 4.12 Address 0300h 0301h 0302h 0303h 0304h 0305h 0306h 0307h 0308h 0309h 030Ah 030Bh 030Ch 030Dh 030Eh 030Fh 0310h 0311h 0312h 0313h 0314h 0315h 0316h 0317h 0318h 0319h 031Ah 031Bh 031Ch 031Dh 031Eh 031Fh 0320h 0321h 0322h 0323h 0324h 0325h 0326h 0327h 0328h 0329h 032Ah 032Bh 032Ch 032Dh 032Eh 032Fh Note: 1. 4.
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M16C/65 Group Table 4.13 4.
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M16C/65 Group Table 4.14 Address 0360h 0361h 0362h 0363h 0364h 0365h 0366h 0367h 0368h 0369h 036Ah 036Bh 036Ch 036Dh 036Eh 036Fh 0370h 0371h 0372h 0373h 0374h 0375h 0376h 0377h 0378h 0379h 037Ah 037Bh 037Ch 037Dh 037Eh 037Fh 0380h to 038Fh 4.
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M16C/65 Group Table 4.15 Address 0390h 0391h 0392h 0393h 0394h 0395h 0396h 0397h 0398h 0399h 039Ah 039Bh 039Ch 039Dh 039Eh 039Fh 03A0h 03A1h 03A2h 03A3h 03A4h 03A5h 03A6h 03A7h 03A8h 03A9h 03AAh 03ABh 03ACh 03ADh 03AEh 03AFh 03B0h 03B1h 03B2h 03B3h 03B4h 03B5h 03B6h 03B7h 03B8h 03B9h 03BAh 03BBh 03BCh 03BDh 03BEh 03BFh 4.
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M16C/65 Group Table 4.16 Address 03C0h 03C1h 03C2h 03C3h 03C4h 03C5h 03C6h 03C7h 03C8h 03C9h 03CAh 03CBh 03CCh 03CDh 03CEh 03CFh 03D0h 03D1h 03D2h 03D3h 03D4h 03D5h 03D6h 03D7h 03D8h 03D9h 03DAh 03DBh 03DCh 03DDh 03DEh 03DFh 03E0h 03E1h 03E2h 03E3h 03E4h 03E5h 03E6h 03E7h 03E8h 03E9h 03EAh 03EBh 03ECh 03EDh 03EEh 03EFh Note: 1. 4.
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M16C/65 Group Table 4.17 Address 03F0h 03F1h 03F2h 03F3h 03F4h 03F5h 03F6h 03F7h 03F8h 03F9h 03FAh 03FBh 03FCh 03FDh 03FEh 03FFh 4.
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M16C/65 Group Table 4.18 4.
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M16C/65 Group 4.2 4. Special Function Registers (SFRs) Notes on SFRs 4.2.1 Register Settings Table 4.19 lists Registers with Write-Only Bits and registers whose function differs between reading and writing. Set these registers with immediate values. Do not use read-modify-write instructions. When establishing the next value by altering the existing value, write the existing value to the RAM as well as to the register. Transfer the next value to the register after making changes in the RAM.
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M16C/65 Group Table 4.20 4. Special Function Registers (SFRs) Read-Modify-Write Instructions Function Transfer Bit processing Shifting Arithmetic operation Decimal operation Logical operation Jump Mnemonic MOVDir BCLR, BMCnd, BNOT, BSET, BTSTC, and BTSTS ROLC, RORC, ROT, SHA, and SHL ABS, ADC, ADCF, ADD, DEC, DIV, DIVU, DIVX, EXTS, INC, MUL, MULU, NEG, SBB, and SUB DADC, DADD, DSBB, and DSUB AND, NOT, OR, and XOR ADJNZ, SBJNZ R01DS0031EJ0210 Rev.2.
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M16C/65 Group 5. 5. Electrical Characteristics Electrical Characteristics 5.1 Electrical Characteristics (Common to 3 V and 5 V) 5.1.1 Table 5.1 Absolute Maximum Rating Absolute Maximum Ratings Rated Value Unit VCC1 Symbol Supply voltage Parameter VCC1 = AVCC Condition −0.3 to 6.5 V VCC2 Supply voltage VCC1 = AVCC −0.3 to VCC1 + 0.1 (1) V AVCC Analog supply voltage VCC1 = AVCC −0.3 to 6.5 V VREF Analog reference voltage VCC1 = AVCC −0.3 to VCC1 + 0.
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M16C/65 Group 5.1.2 5. Electrical Characteristics Recommended Operating Conditions Table 5.2 Recommended Operating Conditions (1/3) VCC1 = VCC2 = 2.7 to 5.5 V at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified. Symbol Parameter VCC1, VCC2 Supply voltage (VCC1 ≥ VCC2) AVCC Analog supply voltage VSS CEC function is not used CEC function is used Min. 2.7 2.7 Standard Typ. 5.0 Max. 5.5 3.
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M16C/65 Group Table 5.3 5. Electrical Characteristics Recommended Operating Conditions (2/3) VCC1 = VCC2 = 2.7 to 5.5 V at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified. Symbol IOL(sum) Parameter Standard Min. Typ. Low peak Sum of IOL(peak) at P0_0 to P0_7, P1_0 to P1_7, output P2_0 to P2_7, P8_6, P8_7, P9_0 to P9_7, current P10_0 to P10_7, P11_0 to P11_7, P14_0 to P14_1 Max. Unit 80.
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M16C/65 Group Table 5.4 5. Electrical Characteristics Recommended Operating Conditions (3/3) (1) VCC1 = 2.7 to 5.5 V, VSS = 0 V, and Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified. The ripple voltage must not exceed Vr(VCC1) and/or dVr(VCC1)/dt. Symbol Vr(VCC1) Standard Parameter Allowable ripple voltage dVr(VCC1)/dt Ripple voltage falling gradient Min. Typ. Max. Unit VCC1 = 5.0 V 0.5 Vp-p VCC1 = 3.0 V 0.3 Vp-p VCC1 = 5.0 V 0.3 V/ms VCC1 = 3.0 V 0.3 V/ms Note: 1.
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M16C/65 Group 5.1.3 Table 5.5 5. Electrical Characteristics A/D Conversion Characteristics A/D Conversion Characteristics (1/2) (1) VCC1 = AVCC = 3.0 to 5.5 V ≥ VCC2 ≥ VREF, VSS = AVSS = 0 V at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified. Symbol Parameter Measuring Condition - Resolution AVCC = VCC1 ≥ VCC2 ≥ VREF INL Integral non-linearity error 10 bits VCC1 = AN0 to AN7 input, AN0_0 to AN0_7 input, 5.
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M16C/65 Group Table 5.6 5. Electrical Characteristics A/D Conversion Characteristics (2/2) (1) VCC1 = AVCC = 3.0 to 5.5 V ≥ VCC2 ≥ VREF, VSS = AVSS = 0 V at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified. Symbol φAD Parameter A/D operating clock frequency Measuring Condition Standard Min. Typ. Max. Unit AN0 to AN7 input, 4.0 V ≤ VCC1 ≤ 5.5 V ANEX0 to ANEX1 3.2 V ≤ V CC1 ≤ 4.0 V input 3.0 V ≤ VCC1 ≤ 3.2 V 2 25 MHz 2 16 MHz 2 10 MHz AN0_0 to AN0_7 4.0 V ≤ VCC2 ≤ 5.
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M16C/65 Group 5.1.5 5. Electrical Characteristics Flash Memory Electrical Characteristics Table 5.8 CPU Clock When Operating Flash Memory (f(BCLK)) VCC1 = 2.7 to 5.5 V, Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified. Symbol Parameter Conditions Standard Min. Typ. Max. Unit - CPU rewrite mode 10 (1) MHz f(SLOW_R) Slow read mode 5 (3) MHz - Low current consumption read mode - Data flash read 35 kHz 2.7 V ≤ VCC1 ≤ 3.0 V fC(32.768) 16 (2) MHz 3.0 V < VCC1 ≤ 5.
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M16C/65 Group Table 5.10 5. Electrical Characteristics Flash Memory (Data Flash) Electrical Characteristics VCC1 = 2.7 to 5.5 V at Topr = -20 to 85°C/-40 to 85°C, unless otherwise specified. Symbol Parameter Conditions Standard Min. Typ. Max. Unit - Program and erase cycles (1), (3), (4) VCC1 = 3.3 V, Topr = 25°C - 2 word program time VCC1 = 3.3 V, Topr = 25°C 300 4000 μs - Lock bit program time VCC1 = 3.3 V, Topr = 25°C 140 3000 μs - Block erase time VCC1 = 3.3 V, Topr = 25°C 0.
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M16C/65 Group 5.1.6 Table 5.11 5. Electrical Characteristics Voltage Detector and Power Supply Circuit Electrical Characteristics Voltage Detector 0 Electrical Characteristics The measurement condition is VCC1 = 2.7 to 5.5 V, Topr = -20°C to 85°C/-40°C to 85°C, unless otherwise specified. Symbol Vdet0 Parameter Condition Standard Min. Typ. Max. Unit Voltage detection level Vdet0_0 (1) When VCC1 is falling. 1.60 1.90 2.20 V Voltage detection level Vdet0_2 (1) When VCC1 is falling. 2.55 2.
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M16C/65 Group Table 5.13 5. Electrical Characteristics Voltage Detector 2 Electrical Characteristics The measurement condition is VCC1 = 2.7 to 5.5 V, Topr = -20°C to 85°C/-40°C to 85°C, unless otherwise specified. Symbol Parameter When VCC1 is falling Vdet2 Voltage detection level Vdet2_0 - Hysteresis width at the rising of VCC1 in voltage detector 2 - Voltage detector 2 response time (2) - Voltage detector self power consumption td(E-A) Standard Condition Min. Typ. Max. 3.50 4.00 4.
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M16C/65 Group 5. Electrical Characteristics Table 5.15 Power Supply Circuit Timing Characteristics The measurement condition is VCC1 = 2.7 to 5.5 V and Topr = 25°C, unless otherwise specified. Symbol Parameter Standard Condition td(P-R) Internal power supply stability time when power is on (1) td(R-S) td(W-S) Min. Typ. Max. Unit 5 ms STOP release time 150 μs Low power mode wait mode release time 150 μs Note: 1.
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M16C/65 Group 5.1.7 Table 5.16 5.
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M16C/65 Group 5.2 5. Electrical Characteristics Electrical Characteristics (VCC1 = VCC2 = 5 V) 5.2.1 Electrical Characteristics VCC1 = VCC2 = 5 V Table 5.19 Electrical Characteristics (1) (1) VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V at Topr = −20°C to 85°C/−40°C to 85°C, f(BCLK) = 32 MHz unless otherwise specified. Symbol VOH Measuring Condition Parameter VCC1 − 2.0 VCC1 IOH = −5 mA VCC2 − 2.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 5 V Table 5.20 Electrical Characteristics (2) (1) VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V at Topr = −20°C to 85°C/−40°C to 85°C, f(BCLK) = 32 MHz unless otherwise specified. Symbol Parameter Measuring Condition Standard Min. Typ. Max.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 5 V Table 5.21 Electrical Characteristics (3) R5F36506NFA, R5F36506NFB, R5F36506DFA, R5F36506DFB, R5F3650ENFA, R5F3650ENFB, R5F3650EDFA, R5F3650EDFB VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V at Topr = −20°C to 85°C/−40°C to 85°C, f(BCLK) = 32 MHz unless otherwise specified. Symbol RfXCIN ICC Note: 1.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 5 V Table 5.22 Electrical Characteristics (4) R5F3651ENFC, R5F3651EDFC, R5F3651KNFC, R5F3650KNFA, R5F3650KNFB, R5F3651KDFC, R5F3650KDFB, R5F3650KDFA, R5F3651MNFC, R5F3650MNFA, R5F3650MNFB, R5F3651MDFC, R5F3650MDFA, R5F3650MDFB, R5F3651NNFC, R5F3650NNFA, R5F3650NNFB, R5F3651NDFC, R5F3650NDFA, R5F3650NDFB VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V at Topr = −20°C to 85°C/−40°C to 85°C, f(BCLK) = 32 MHz unless otherwise specified.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 5 V Table 5.23 Electrical Characteristics (5) R5F3651RNFC, R5F3650RNFA, R5F3650RNFB, R5F3651RDFC, R5F3650RDFA, R5F3650RDFB, R5F3651TNFC, R5F3650TNFA, R5F3650TNFB, R5F3651TDFC, R5F3650TDFA, R5F3650TDFB VCC1 = VCC2 = 4.2 to 5.5 V, VSS = 0 V at Topr = −20 to 85°C/−40 to 85°C, f(BCLK) = 32 MHz unless otherwise specified. Symbol RfXCIN ICC Parameter Measuring Condition Feedback resistance XCIN Power supply current High-speed mode Min.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 5 V 5.2.2 Timing Requirements (Peripheral Functions and Others) (VCC1 = VCC2 = 5 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.2.2.1 Reset Input (RESET Input) Table 5.24 Reset Input (RESET Input) Symbol Standard Parameter Min. RESET input low pulse width tw(RSTL) Max. Unit μs 10 RESET input t w(RTSL) Figure 5.5 5.2.2.2 Table 5.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Timing Requirements (VCC1 = VCC2 = 5 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.2.2.3 Table 5.26 Timer A Input Timer A Input (Counter Input in Event Counter Mode) Symbol Standard Parameter Min. Max. Unit tc(TA) TAiIN input cycle time 100 ns tw(TAH) TAiIN input high pulse width 40 ns tw(TAL) TAiIN input low pulse width 40 ns Table 5.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Timing Requirements (VCC1 = VCC2 = 5 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) Table 5.30 5V Timer A Input (Two-Phase Pulse Input in Event Counter Mode) Symbol Standard Parameter Min. Max.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Timing Requirements (VCC1 = VCC2 = 5 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.2.2.4 Table 5.31 5V Timer B Input Timer B Input (Counter Input in Event Counter Mode) Symbol Standard Parameter Min. Max.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Timing Requirements (VCC1 = VCC2 = 5 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.2.2.5 Table 5.34 5V Serial Interface Serial Interface Symbol Standard Parameter Min. Max.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Timing Requirements (VCC1 = VCC2 = 5 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5V Multi-master I2C-bus 5.2.2.7 Multi-master I2C-bus Table 5.36 Symbol Standard Clock Mode Parameter Min. Fast-mode Max. Min. Unit Max. tBUF Bus free time 4.7 1.3 μs tHD;STA Hold time in start condition 4.0 0.6 μs tLOW Hold time in SCL clock 0 status 4.7 1.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Timing Requirements (VCC1 = VCC2 = 5 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.2.3 5V Timing Requirements (Memory Expansion Mode and Microprocessor Mode) Table 5.37 Memory Expansion Mode and Microprocessor Mode Symbol Parameter Standard Min. Max.
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M16C/65 Group 5. Electrical Characteristics Memory Expansion Mode and Microprocessor Mode VCC1 = VCC2 = 5 V (Effective in wait state setting) BCLK RD (Separate bus) WR, WRL, WRH (Separate bus) RD (Multiplexed bus) WR, WRL, WRH (Multiplexed bus) RDY input tsu(RDY-BCLK) th(BCLK-RDY) Measuring conditions y VCC1 = VCC2 = 5 V y Input timing voltage: VIL = 1.0 V, VIH = 4.0 V y Output timing voltage: VOL = 2.5 V, VOH = 2.5 V Figure 5.13 Timing Diagram R01DS0031EJ0210 Rev.2.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 5 V 5.2.4 Switching Characteristics (Memory Expansion Mode and Microprocessor Mode) (VCC1 = VCC2 = 5 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.2.4.1 Table 5.
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M16C/65 Group 5. Electrical Characteristics P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 Figure 5.14 30 pF Ports P0 to P14 Measurement Circuit R01DS0031EJ0210 Rev.2.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 5V Memory Expansion Mode and Microprocessor Mode (in no wait state setting) Read timing BCLK td(BCLK-CS) th(BCLK-CS) 25ns(max.) 0ns(min.) CSi tcyc td(BCLK-AD) th(BCLK-AD) 25ns(max.) ADi BHE td(BCLK-ALE) 15ns(max.) 0ns(min.) th(BCLK-ALE) th(RD-AD) -4ns(min.) 0ns(min.) ALE th(BCLK-RD) td(BCLK-RD) 25ns(max.) 0ns(min.) RD tac1(RD-DB) (0.5 × t cyc - 45)ns(max.) Hi-Z DBi tsu(DB-RD) 40ns(min.) th(RD-DB) 0ns(min.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Switching Characteristics (VCC1 = VCC2 = 5 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.2.4.2 Table 5.39 5V In 1 to 3 Waits Setting and When Accessing External Area Memory Expansion Mode and Microprocessor Mode (in 1 to 3 Waits Setting and When Accessing External Area) Symbol Measuring Condition Parameter Standard Min. Max.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 5V Memory Expansion Mode and Microprocessor Mode (in 1 to 3 waits setting and when accessing external area) Read timing BCLK td(BCLK-CS) th(BCLK-CS) 25ns(max.) 0ns(min.) CSi tcyc ADi BHE td(BCLK-AD) th(BCLK-AD) 25ns(max.) 0ns(min.) td(BCLK-ALE) 15ns(max.) th(BCLK-ALE) th(RD-AD) -4ns(min.) 0ns(min.) ALE th(BCLK-RD) td(BCLK-RD) 0ns(min.) 25ns(max.) RD tac2(RD-DB) {(n+0.5) × tcyc -45}ns(max.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Switching Characteristics (VCC1 = VCC2 = 5 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5V 5.2.4.3 In 2 or 3 Waits Setting, and When Accessing External Area and Using Multiplexed Bus Table 5.40 Memory Expansion Mode and Microprocessor Mode (in 2 or 3 Waits Setting, and When Accessing External Area and Using Multiplexed Bus) (5) Symbol Parameter Measuring Condition Standard Min. Max.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 5V Memory Expansion Mode and Microprocessor Mode (in 2 or 3 waits setting, and when accessing external area and using multiplexed bus ) Read timing BCLK th(BCLK-CS) td(BCLK-CS) th(RD-CS) tcyc 25ns(max.) 0ns(min.) (0.5 × t cyc-10)ns(min.) CSi td(AD-ALE) (0.5 × t cyc-25ns(min.) ADi /DBi th(ALE-AD) (0.5 × t cyc-15ns(min.) Address Address Data input tdz(RD-AD) 8ns(max.) tsu(DB-RD) tac3(RD-DB) {(n-0.5) × tcyc -45}ns(max.) 40ns(min.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Switching Characteristics (VCC1 = VCC2 = 5 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5V 5.2.4.4 In Wait State Setting 2φ + 3φ, 2φ + 4φ, 3φ + 4φ, and 4φ + 5φ, and When Accessing External Area Table 5.41 Memory Expansion Mode and Microprocessor Mode (in Wait State Setting 2 φ + 3 φ, 2 φ + 4φ, 3φ + 4φ, and 4φ + 5φ, and When Accessing External Area) Symbol Measuring Condition Parameter Standard Min. Max.
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M16C/65 Group 5. Electrical Characteristics Memory Expansion Mode and Microprocessor Mode (in wait state setting 2 φ + 3 φ, 2 φ + 4 φ, 3φ + 4 φ, and 4 φ + 5 φ, and when accessing external area) Read timing VCC1 = VCC2 = 5V tcyc BCLK th(BCLK-CS) 0ns(min.) td(BCLK-CS) 25ns(max.) CSi td(BCLK-AD) 25ns(max.) th(BCLK-AD) 0ns(min.) ADi BHE td(BCLK-ALE) 15ns(max.) th(RD-AD) 0ns(min.) th(BCLK-ALE) -4ns(min.) ALE td(BCLK-RD) 25ns(max.) th(BCLK-RD) 0ns(min.) RD tac4(RD-DB) (n × tcyc-45)ns(max.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Switching Characteristics (VCC1 = VCC2 = 5 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.2.4.5 5V In Wait State Setting 2φ + 3φ, 2φ + 4φ, 3φ + 4φ, and 4φ + 5φ, and When Inserting 1 to 3 Recovery Cycles and Accessing External Area Table 5.
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M16C/65 Group 5. Electrical Characteristics Memory Expansion Mode and Microprocessor Mode (in wait state setting 2 φ + 3 φ, 2 φ + 4 φ, 3φ + 4 φ, and 4 φ + 5 φ, and when inserting 1 to 3 recovery cycles and accessing external area) Read timing VCC1 = VCC2 = 5V tcyc BCLK th(BCLK-CS) 0ns(min.) td(BCLK-CS) 25ns(max.) CSi th(BCLK-AD) 0ns(min.) td(BCLK-AD) 25ns(max.) ADi BHE td(BCLK-ALE) 15ns(max.) th(RD-AD) (m × tcyc+0)ns(min.) th(BCLK-ALE) -4ns(min.) ALE th(BCLK-RD) 0ns(min.) td(BCLK-RD) 25ns(max.
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M16C/65 Group 5.3 5. Electrical Characteristics Electrical Characteristics (VCC1 = VCC2 = 3 V) 5.3.1 Electrical Characteristics VCC1 = VCC2 = 3 V Table 5.43 Electrical Characteristics (1) (1) VCC1 = VCC2 = 2.7 to 3.3 V, VSS = 0 V at Topr = -20°C to 85°C/-40°C to 85°C, f(BCLK) = 32 MHz unless otherwise specified. Symbol VOH VOH Parameter High output voltage VOL VT+-VT- Standard Min. Typ. IOH = −1 mA VCC1 − 0.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 3 V Table 5.44 Electrical Characteristics (2) R5F36506NFA, R5F36506NFB, R5F36506DFA, R5F36506DFB, R5F3650ENFA, R5F3650ENFB, R5F3650EDFA, R5F3650EDFB VCC1 = VCC2 = 2.7 to 3.3 V, VSS = 0 V at Topr = −20°C to 85°C/−40°C to 85°C, f(BCLK) = 32 MHz unless otherwise specified.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 3 V Table 5.45 Electrical Characteristics (3) R5F3651ENFC, R5F3651EDFC, R5F3651KNFC, R5F3650KNFA, R5F3650KNFB, R5F3651KDFC, R5F3650KDFA, R5F3650KDFB, R5F3651MNFC, R5F3650MNFA, R5F3650MNFB, R5F3651MDFC, R5F3650MDFA, R5F3650MDFB, R5F3651NNFC, R5F3650NNFA, R5F3650NNFB, R5F3651NDFC, R5F3650NDFA, R5F3650NDFB VCC1 = VCC2 = 2.7 to 3.3 V, VSS = 0 V at Topr = −20°C to 85°C/−40°C to 85°C, f(BCLK) = 32 MHz unless otherwise specified.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 3 V Table 5.46 Electrical Characteristics (4) R5F3651RNFC, R5F3650RNFA, R5F3650RNFB, R5F3651RDFC, R5F3650RDFA, R5F3650RDFB, R5F3651TNFC, R5F3650TNFA, R5F3650TNFB, R5F3651TDFC, R5F3650TDFA, R5F3650TDFB VCC1 = VCC2 = 2.7 to 3.3 V, VSS = 0 V at Topr = −20°C to 85°C/−40°C to 85°C, f(BCLK) = 32 MHz unless otherwise specified. Symbol RfXCIN ICC Parameter Measuring Condition Feedback resistance XCIN Power supply current High-speed mode Min.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 3 V 5.3.2 Timing Requirements (Peripheral Functions and Others) (VCC1 = VCC2 = 3 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.3.2.1 Reset Input (RESET Input) Table 5.47 Reset Input (RESET Input) Symbol Standard Parameter Min. RESET input low pulse width tw(RSTL) Max. Unit μs 10 RESET input t w(RTSL) Figure 5.20 5.3.2.2 Table 5.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Timing Requirements (VCC1 = VCC2 = 3 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.3.2.3 Table 5.49 Timer A Input Timer A Input (Counter Input in Event Counter Mode) Symbol Standard Parameter Min. Unit Max. tc(TA) TAiIN input cycle time 150 ns tw(TAH) TAiIN input high pulse width 60 ns tw(TAL) TAiIN input low pulse width 60 ns Table 5.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Timing Requirements (VCC1 = VCC2 = 3 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) Table 5.53 3V Timer A Input (Two-Phase Pulse Input in Event Counter Mode) Symbol Standard Parameter Min. Max.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Timing Requirements (VCC1 = VCC2 = 3 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.3.2.4 Table 5.54 3V Timer B Input Timer B Input (Counter Input in Event Counter Mode) Symbol Standard Parameter Min. Max.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Timing Requirements (VCC1 = VCC2 = 3 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.3.2.5 Table 5.57 3V Serial Interface Serial Interface Symbol Standard Parameter Min. Max.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Timing Requirements (VCC1 = VCC2 = 3 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 3V Multi-master I2C-bus 5.3.2.7 Multi-master I2C-bus Table 5.59 Symbol Standard Clock Mode Parameter Min. Fast-mode Max. Min. Unit Max. tBUF Bus free time 4.7 1.3 μs tHD;STA Hold time in start condition 4.0 0.6 μs tLOW Hold time in SCL clock 0 status 4.7 1.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Timing Requirements (VCC1 = VCC2 = 3 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.3.3 3V Timing Requirements (Memory Expansion Mode and Microprocessor Mode) Table 5.60 Memory Expansion Mode and Microprocessor Mode Symbol Parameter Standard Min. Max.
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M16C/65 Group 5. Electrical Characteristics Memory Expansion Mode and Microprocessor Mode VCC1 = VCC2 = 3 V (Effective in wait state setting) BCLK RD (Separate bus) WR, WRL, WRH (Separate bus) RD (Multiplexed bus) WR, WRL, WRH (Multiplexed bus) RDY input tsu(RDY-BCLK) th(BCLK-RDY) Measuring conditions y VCC1 = VCC2 = 3 V y Input timing voltage: VIL = 0.6 V, VIH = 2.4 V y Output timing voltage: VOL = 1.5 V, VOH = 1.5 V Figure 5.28 Timing Diagram R01DS0031EJ0210 Rev.2.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 3 V 5.3.4 Switching Characteristics (Memory Expansion Mode and Microprocessor Mode) (VCC1 = VCC2 = 3 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.3.4.1 Table 5.61 In No Wait State Setting Memory Expansion and Microprocessor Modes (in No Wait State Setting) Symbol Measuring Condition Parameter Standard Min. Max.
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M16C/65 Group 5. Electrical Characteristics P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 Figure 5.29 30 pF Ports P0 to P14 Measurement Circuit R01DS0031EJ0210 Rev.2.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 3V Memory Expansion Mode and Microprocessor Mode (in no wait state setting) Read timing BCLK td(BCLK-CS) th(BCLK-CS) 30ns(max.) 0ns(min.) CSi tcyc td(BCLK-AD) th(BCLK-AD) 30ns(max.) ADi BHE td(BCLK-ALE) 25ns(max.) 0ns(min.) th(BCLK-ALE) th(RD-AD) -4ns(min.) 0ns(min.) ALE th(BCLK-RD) td(BCLK-RD) 30ns(max.) 0ns(min.) RD tac1(RD-DB) (0.5 × t cyc-60)ns(max.) Hi-Z DBi tsu(DB-RD) th(RD-DB) 50ns(min.) 0ns(min.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Switching Characteristics (VCC1 = VCC2 = 3 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.3.4.2 Table 5.62 3V In 1 to 3 Waits Setting and When Accessing External Area Memory Expansion Mode and Microprocessor Mode (in 1 to 3 Waits Setting and When Accessing External Area) Symbol Measuring Condition Parameter Standard Min. Max.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 3V Memory Expansion Mode and Microprocessor Mode (in 1 to 3 waits setting and when accessing external area) Read timing BCLK td(BCLK-CS) th(BCLK-CS) 30ns(max.) 0ns(min.) CSi tcyc ADi BHE td(BCLK-AD) th(BCLK-AD) 30ns(max.) 0ns(min.) td(BCLK-ALE) 25ns(max.) th(BCLK-ALE) th(RD-AD) -4ns(min.) 0ns(min.) ALE th(BCLK-RD) td(BCLK-RD) 0ns(min.) 30ns(max.) RD tac2(RD-DB) {(n+0.5) × tcyc -60}ns(max.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Switching Characteristics (VCC1 = VCC2 = 3 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 3V 5.3.4.3 In 2 or 3 Waits Setting, and When Accessing External Area and Using Multiplexed Bus Table 5.63 Memory Expansion Mode and Microprocessor Mode (in 2 or 3 Waits Setting, and When Accessing External Area and Using Multiplexed Bus) (5) Symbol Measuring Condition Parameter Standard Min. Max.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = 3V Memory Expansion Mode and Microprocessor Mode (in 2 or 3 waits setting, and when accessing external area and using multiplexed bus ) Read timing BCLK th(BCLK-CS) td(BCLK-CS) th(RD-CS) tcyc 50ns(max.) 0ns(min.) (0.5 × t cyc-10)ns(min.) CSi td(AD-ALE) (0.5 × t cyc-40ns(min.) ADi /DBi th(ALE-AD) (0.5 × t cyc-15ns(min.) Address Address Data input tdz(RD-AD) 8ns(max.) tsu(DB-RD) tac3(RD-DB) {(n-0.5) × tcyc -60}ns(max.) 50ns(min.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Switching Characteristics (VCC1 = VCC2 = 3 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 5.3.4.4 Table 5.64 3V In Wait State Setting 2φ + 3φ, 2φ + 4φ, 3φ + 4φ, and 4φ + 5φ, and When Accessing External Area Memory Expansion and Microprocessor Modes (in Wait State Setting 2φ + 3φ, 2φ + 4φ, 3φ + 4φ, and 4φ + 5φ, and When Accessing External Area) Symbol Measuring Condition Parameter Standard Min. Max.
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M16C/65 Group 5. Electrical Characteristics Memory Expansion Mode, Microprocessor Mode (in wait state setting 2 φ + 3 φ, 2 φ + 4 φ, 3φ + 4 φ, and 4 φ + 5 φ, and when accessing external area) Read timing VCC1 = VCC2 = 3V tcyc BCLK th(BCLK-CS) 0ns(min.) td(BCLK-CS) 30ns(max.) CSi td(BCLK-AD) 30ns(max.) th(BCLK-AD) 0ns(min.) ADi BHE td(BCLK-ALE) 25ns(max.) th(RD-AD) 0ns(min.) th(BCLK-ALE) -4ns(min.) ALE td(BCLK-RD) 30ns(max.) th(BCLK-RD) 0ns(min.) RD tac4(RD-DB) (n × tcyc-60)ns(max.
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M16C/65 Group 5. Electrical Characteristics VCC1 = VCC2 = Switching Characteristics (VCC1 = VCC2 = 3 V, VSS = 0 V, at Topr = -20°C to 85°C/-40°C to 85°C unless otherwise specified) 3V 5.3.4.5 In Wait State Setting 2φ + 3φ, 2φ + 4φ, 3φ + 4φ, and 4φ + 5φ, and Inserting 1 to 3 Recovery Cycles and Accessing External Area Table 5.
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M16C/65 Group 5. Electrical Characteristics Memory Expansion Mode and Microprocessor Mode (in wait state setting 2 φ + 3 φ, 2 φ + 4 φ, 3φ + 4 φ, and 4 φ + 5 φ, and when inserting 1 to 3 recovery cycles inserted and accessing external area) Read timing VCC1 = VCC2 = 3V tcyc BCLK th(BCLK-CS) 0ns(min.) td(BCLK-CS) 30ns(max.) CSi th(BCLK-AD) 0ns(min.) td(BCLK-AD) 30ns(max.) ADi BHE td(BCLK-ALE) 25ns(max.) th(RD-AD) (m × tcyc+0)ns(min.) th(BCLK-ALE) -4ns(min.) ALE th(BCLK-RD) 0ns(min.
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M16C/65 Group Appendix 1. Package Dimensions Appendix 1. Package Dimensions The information on the latest package dimensions or packaging may be obtained from “Packages“ on the Renesas Electronics website. JEITA Package Code P-LQFP128-14x20-0.50 RENESAS Code PLQP0128KB-A Previous Code 128P6Q-A MASS[Typ.] 0.9g HD *1 D 102 65 103 64 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
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M16C/65 Group Appendix 1. Package Dimensions JEITA Package Code P-LQFP100-14x14-0.50 RENESAS Code PLQP0100KB-A Previous Code 100P6Q-A / FP-100U / FP-100UV MASS[Typ.] 0.6g HD *1 D 51 75 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
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REVISION HISTORY M16C/65 Group Datasheet Description Rev. Date 1.00 Feb 02, 2009 - First Edition issued. 1.10 Sep 24, 2009 3 Table 1.2 Specifications for the 128-Pin Package (2/2) partially modified 5 Table 1.4 Specifications for the 100-Pin Package (2/2) partially modified 6 Table 1.5 Product List (1/2) partially modified 2.00 Dec 10, 2010 Page Summary 7 Table 1.6 Product List (2/2) partially modified 8 Figure 1.2 Marking Diagram (Top View) partially modified 29 Figure 3.
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REVISION HISTORY Rev. 2.00 Date M16C/65 Group Datasheet Description Page Summary Dec 10, 2010 Special Function Registers (SFRs) 31 Table 4.1 SFR Information (1): • Deleted “the VCR1 register, the VCR2 register” from note 2. • Deleted notes 5 to 6 and added note 5. 32 Table 4.2 SFR Information (2): Deleted notes 2 to 7 and added note 2. 49 4.2.1 Register Settings: Added the description regarding read-modify-write instructions. 50 Table 4.20 Read-Modify-Write Instructions: Added.
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General Precautions in the Handling of MPU/MCU Products The following usage notes are applicable to all MPU/MCU products from Renesas. For detailed usage notes on the products covered by this manual, refer to the relevant sections of the manual. If the descriptions under General Precautions in the Handling of MPU/MCU Products and in the body of the manual differ from each other, the description in the body of the manual takes precedence. 1.
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Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 2.