Datasheet

R01DS0032EJ0200 Rev.2.00 Page 80 of 88
Feb 07, 2011
M16C/64A Group 5. Electrical Characteristics
Figure 5.26 Timing Diagram
Memory Expansion Mode and Microprocessor Mode
(Effective in wait state setting)
RDY input
RD
BCLK
(Separate bus)
(Multiplexed bus)
RD
(Separate bus)
(Multiplexed bus)
t
su(RDY-BCLK) t
h(BCLK-RDY)
Measuring conditions
y V
= V = 3 V
CC1 CC2
y Input timing voltage: V = 0.6 V, V = 2.4 V
IL IH
y Output timing voltage: V = 1.5 V, V = 1.5 V
OL OH
V = V = 3 V
CC1 CC2
WR, WRL, WRH
WR
, WRL, WRH