Datasheet
R01DS0033EJ0220 Rev.2.20 Page 15 of 115
Nov 01, 2012
M16C/63 Group 1. Overview
Figure 1.9 Pin Assignment for the 80-Pin Package
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
M16C/63 Group
PLQP0080KB-A
(80P6Q-A)
(Top view)
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
22
23
25
26
28
29
30
31
32
33
34
35
36
37
38
39
21
24
4061
27
P4_2
P4_3
P5_6
P5_5
P5_4
P5_3
P5_2
P5_7/CLKOUT
P6_3/TXD0/SDA0
P6_5/CLK1
P6_6/RXD1/SCL1
P6_7/TXD1/SDA1
P6_1/CLK0
P6_2/RXD0/SCL0
P6_0/TRHO/CTS0/RTS0
P6_4/CTS1/RTS1/CTS0/CLKS1
P7_1/RXD2/SCL2/TA0IN/TB5IN/SCLMM
(1)
P5_0
P5_1
P7_0/TXD2/SDA2/TA0OUT/SDAMM
(1)
P3_0
P3_1
P3_2
P3_3
P3_4
P3_5
P3_6
P3_7
P4_0
P4_1
VCC1
XIN
XOUT
VSS
RESET
CNVSS(BYTE)
P8_7/XCIN
P8_6/XCOUT
P7_6/TA3OUT/TXD5/SDA5
P7_7/TA3IN/CLK5
P9_3/DA0/TB3IN/PWM0
P9_4/DA1/TB4IN/PWM1
P9_5/ANEX0/CLK4
P9_2/TB2IN/PMC0/SOUT3
P8_2/INT0
P8_3/INT1
P8_1/TA4IN/CTS5/RTS5
P8_4/INT2/ZP
P8_0/TA4OUT/RXD5/SCL5
P8_5/NMI/CEC
(1)
P0_1/AN0_1
P0_2/AN0_2
P0_3/AN0_3
P0_4/AN0_4
P0_5/AN0_5
P0_6/AN0_6
P0_7/AN0_7
P9_6/ANEX1/SOUT4
P9_7/ADTRG/SIN4
P9_0/TB0IN/CLK3
P2_0/AN2_0
P2_1/AN2_1
P2_2/AN2_2
P2_4/INT6/AN2_4
P2_5/INT7/AN2_5
P2_6/AN2_6
P2_7/AN2_7
P2_3/AN2_3
Notes:
1. N-channel open drain output.
2. Check the position of Pin 1 by referring to appendix 1, Package Dimensions.
P0_0/AN0_0
VREF
AVSS
AVCC
P10_0/AN0/KI4
P10_1/AN1/KI5
P10_2/AN2/KI6
P10_3/AN3/KI7
P10_4/AN4/KI0
P10_5/AN5/KI1
P10_6/AN6/KI2
P10_7/AN7/KI3