Datasheet

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REVISION HISTORY M16C/63 Group Datasheet
Rev. Date
Description
Page Summary
0.30 Jul 15, 2009 - First Edition issued.
0.40 Aug 18, 2009 3 Table 1.2 “Specifications for the 100-Pin Package (2/2)” partially modified
6 Table 1.5 “Product List” partially modified
7 Figure 1.1 “Part No., with Memory Size and Package” partially modified
12 Figure 1.7 “Pin Assignment for the 100-Pin Package” added
13 Table 1.6 “Pin Names for the 100-Pin Package (1/2)” partially modified
14 Table 1.7 “Pin Names for the 100-Pin Package (2/2)” partially modified
107 Table 5.65 “External Clock Input (XIN Input)” partially modified
112 Appendix 1. “Package Dimensions”
PTLG0100KA-A added
0.41 Aug 25, 2009 6 Table 1.5 “Product List” Part No. partially modified
7 Figure 1.3 “Marking Diagram (Top View) (2/2)” added
1.00 Sep 15, 2009 52 Table 5.6 “A/D Conversion Characteristics (1/2)” note 3 added
2.00 Feb 07, 2011 Overall 001Ah Voltage Detector Operation Enable Register: Changed reset value from “000X 0000b”.
Overall 002Ah Voltage Monitor 0 Control Register: Changed reset value from “1100 XX10b”.
Overall 002Bh Voltage Monitor 1 Control Register: Changed reset value from “1000 1X10b”.
Overall 0324h Increment/Decrement Flag: Changed name from Up/Down Flag.
Overall 03DCh D/A Control Register: Changed reset value from “XXXX XX00b”.
Overall D08Ah to D08Bh PMC0 Counter Value Register: Deleted.
Overall D09Eh to D09Fh PMC1 Counter Value Register: Deleted.
Overview
3, 5
Table 1.2 and Table 1.4 Specifications for the 100/80-Pin Package: Deleted note 1.
6
Table 1.5 Product List: Changed the development status.
18
Table 1.10 Pin Functions for the 100-Pin Package (1/3):
Changed the descriptions of the
HOLD pin.
Address Space
27 Figure 3.2 Memory Map: Added note 1 and 3 to the reserved areas.
Special Function Registers (SFRs)
29 Table 4.1 SFR Information (1):
• Deleted “the VCR1 register, the VCR2 register” from note 2.
• Deleted notes 5 to 6 and added note 5.
30 Table 4.2 SFR Information (2): Deleted notes 2 to 7 and added note 2.
47 4.2.1 Register Settings: Added the description regarding read-modify-write instructions.
48 Table 4.20 Read-Modify-Write Instructions: Added.
Electrical Characteristics
49 Table 5.1 Absolute Maximum Ratings:
Divide a row for T
opr
(Flash program erase) into Program area and Data area.
50 Table 5.2 Recommended Operating Conditions (1/4):
Added rows for the CEC value to V
CC1
, V
IH
, and V
IL
.
56 Table 5.9 CPU Clock When Operating Flash Memory (f
(BCLK)
): Added note 3.
56 Table 5.10 Flash Memory (Program ROM 1, 2) Electrical Characteristics:
Added a condition to the Read voltage row.
59 Table 5.15 Power-On Reset Circuit:
• Changed the maximum value for V
por1
from 0.1.
• Added the t
w(por)
row.
• Added the last line in note 1.
59 Figure 5.4 Power-On Reset Circuit Electrical Characteristics: Deleted note 2.
61 Table 5.17 40 MHz On-Chip Oscillator Electrical Characteristics: Deleted note 1.
63 Table 5.20 Electrical Characteristics (2): Added “ZP, IDU, IDV, IDW” to the V
T+
- V
T-
row.
70, 91, 113
5.2.2.7, 5.3.2.7, and 5.4.2.7 Multi-master I
2
C-bus: Added.
71 Table 5.35 Memory Expansion Mode and Microprocessor Mode:
Changed
RDY input setup time from 30.