Datasheet

R8C/M11A Group, R8C/M12A Group 1. Overview
R01DS0010EJ0200 Rev.2.00 Page 7 of 45
May 31, 2012
1.3 Block Diagram
Figure 1.2 shows the Block Diagram.
Figure 1.2 Block Diagram
I/O ports
Watchdog timer
(14 bits)
System clock generation
circuit
XIN-XOUT
High-speed on-chip oscillator
Low-speed on-chip oscillator
Timers
Timer RJ2 (16 bits × 1)
Timer RB2 (8 bits × 1
or 16 bits × 1)
Timer RC (16 bits × 1)
A/D converter
(10 bits × 6 channels)
UART
Clock synchronous serial I/O
Clock asynchronous serial I/O
Peripheral functions
Voltage detection circuit
RAM
(2)
Multiplier
SB
USP
INTB
ISP
FLG
PC
R8C CPU core Memory
ROM
(1)
R0H
R1H
R2
R3
R0L
R1L
A0
FB
A1
Notes:
1. ROM size varies with the product.
2. RAM size varies with the product.
Port P1
8
Port P3
4
Port P4
4
Comparator B
Port PA
1