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R01DS0010EJ0200 Rev.2.00 Page 1 of 45

May 31, 2012

R8C/M11A Group, R8C/M12A Group

RENESAS MCU

Datasheet

1. Overview

1.1 Features

The R8C/M11A Group and R8C/M12A Group of single-chip microcontrollers (MCUs) incorporate the R8C CPU

core, which provides sophisticated instructions for a high level of efficiency. With 1 Mbyte of address space, the

CPU core is capable of executing instructions at high speed. In addition, it features a multiplier for high-speed

arithmetic processing.

Power consumption is low, and the supported operating modes allow additional power control. These MCUs are

designed to maximize EMI/EMS performance.

Integration of many peripheral functions on the same chip, including multifunction timer and serial interface,

reduces the number of system components.

The R8C/M11A Group and R8C/M12A Group include data flash (1 KB × 2 blocks).

1.1.1 Applications

Home appliances, office equipment, audio equipment, consumer products, etc.

R01DS0010EJ0200

Rev.2.00

May 31, 2012

Summary of content (48 pages)

PAGE 1
Datasheet R8C/M11A Group, R8C/M12A Group RENESAS MCU 1. R01DS0010EJ0200 Rev.2.00 May 31, 2012 Overview 1.1 Features The R8C/M11A Group and R8C/M12A Group of single-chip microcontrollers (MCUs) incorporate the R8C CPU core, which provides sophisticated instructions for a high level of efficiency. With 1 Mbyte of address space, the CPU core is capable of executing instructions at high speed. In addition, it features a multiplier for high-speed arithmetic processing.
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R8C/M11A Group, R8C/M12A Group 1.1.2 1. Overview Differences between Groups Table 1.1 lists the Specification Comparison between R8C/M11A Group and R8C/M12A Group. The explanations in 1.1.3 and subsequent sections apply to the R8C/M12A Group specifications only, unless otherwise specified. Table 1.
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R8C/M11A Group, R8C/M12A Group 1. Overview Table 1.2 lists the R8C/M11A Group Register Settings. These settings correspond to the specification differences between the R8C/M11A Group and R8C/M12A Group. Table 1.
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R8C/M11A Group, R8C/M12A Group 1.1.3 1. Overview Specifications Tables 1.3 and 1.4 outline the Specifications. Table 1.3 Item CPU Memory Specifications (1) Function Central processing unit ROM, RAM, data flash Reset sources Voltage Voltage detection detection circuit Watchdog timer Clock Clock generation circuits Power control Interrupts I/O ports Timer Programmable I/O ports Timer RJ2 Timer RB2 Timer RC Serial UART0 interface A/D converter Comparator B R01DS0010EJ0200 Rev.2.
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R8C/M11A Group, R8C/M12A Group Table 1.4 Item Flash memory 1. Overview Specifications (2) Function Operating frequency/ Power supply voltage Temperature range Package Description • Program/erase voltage for program ROM: VCC = 1.8 V to 5.5 V • Program/erase voltage for data flash: VCC = 1.8 V to 5.
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R8C/M11A Group, R8C/M12A Group 1.2 1. Overview Product List Table 1.5 lists the Product List. Figure 1.1 shows the Product Part Number Structure. Table 1.5 Group Name R8C/M11A Group R8C/M12A Group Product List Part No.
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R8C/M11A Group, R8C/M12A Group 1.3 1. Overview Block Diagram Figure 1.2 shows the Block Diagram.
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R8C/M11A Group, R8C/M12A Group 1.4 1. Overview Pin Assignment Figures 1.3 and 1.4 show Pin Assignment (Top View). Table 1.6 lists the Pin Name Information by Pin Number.
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R8C/M11A Group, R8C/M12A Group Table 1.6 1.
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R8C/M11A Group, R8C/M12A Group 1.5 1. Overview Pin Functions Table 1.7 lists the Pin Functions. Table 1.7 Pin Functions Item Pin Name Power supply input VCC, VSS I/O — Analog power supply input Reset input — MODE XIN clock input XIN clock output INT interrupt input Key input interrupt I/O ports Timer RJ2 Timer RB2 Timer RC Serial interface A/D converter Comparator B AVCC, AVSS I Description Apply 1.8 V through 5.5 V to the VCC pin. Apply 0 V to the VSS pin.
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R8C/M11A Group, R8C/M12A Group 2. 2. Central Processing Unit (CPU) Central Processing Unit (CPU) Figure 2.1 shows the 13 CPU Registers. The registers, R0, R1, R2, R3, A0, A1, and FB form a single register bank. The CPU has two register banks.
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R8C/M11A Group, R8C/M12A Group 2.1 2. Central Processing Unit (CPU) Data Registers (R0, R1, R2, and R3) R0 is a 16-bit register for transfer, arithmetic, and logic operations. The same applies to R1 through R3. R0 can be split into high-order (R0H) and low-order (R0L) registers to be used separately as 8-bit data registers. The same applies to R1H and R1L. R2 can be combined with R0 and used as a 32-bit data register (R2R0).
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R8C/M11A Group, R8C/M12A Group 2.8.7 2. Central Processing Unit (CPU) Interrupt Enable Flag (I) The I flag enables maskable interrupts. Interrupts are disabled when the I flag is 0, and are enabled when the I flag is 1. The I flag is set to 0 when an interrupt request is acknowledged. 2.8.8 Stack Pointer Select Flag (U) ISP is selected when the U flag is 0. USP is selected when the U flag is 1.
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R8C/M11A Group, R8C/M12A Group 3. 3. Address Space Address Space 3.1 Memory Map Figure 3.1 shows the Memory Map. The R8C/M11A Group and R8C/M12A Group have a 1-Mbyte address space from addresses 00000h to FFFFFh. The internal ROM (program ROM) is allocated at lower addresses, beginning with address 0FFFFh. For example, an 8-Kbyte internal ROM area is allocated at addresses 0E000h to 0FFFFh. The fixed interrupt vector table is allocated at addresses 0FFDCh to 0FFFFh.
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R8C/M11A Group, R8C/M12A Group 3.2 3. Address Space Special Function Registers (SFRs) An SFR (special function register) is a control register for a peripheral function. Tables 3.1 to 3.8 list the SFR Information. Table 3.9 lists the ID Code Area and Option Function Select Area. Table 3.
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R8C/M11A Group, R8C/M12A Group Table 3.2 Address 0003Ah 0003Bh 0003Ch 0003Dh 0003Eh 0003Fh 00040h 00041h 00042h 00043h 00044h 00045h 00046h 00047h 00048h 00049h 0004Ah 0004Bh 0004Ch 0004Dh 0004Eh 0004Fh 00050h 00051h 00052h 00053h 00054h 00055h 00056h 00057h 00058h 00059h 0005Ah 0005Bh 0005Ch 3.
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R8C/M11A Group, R8C/M12A Group Table 3.3 3.
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R8C/M11A Group, R8C/M12A Group Table 3.4 Address 000C0h 000C1h 000C2h 000C3h 000C4h 000C5h 000C6h 000C7h 000C8h 000C9h 000CAh 000CBh 000CCh 000CDh 000CEh 000CFh 000D0h 000D1h 000D2h 000D3h 000D4h 000D5h 000D6h 000D7h 000D8h 000D9h 000DAh 000DBh 000DCh 000DDh 000DEh 000DFh 000E0h 000E1h 000E2h 000E3h 000E4h 000E5h 000E6h 3.
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R8C/M11A Group, R8C/M12A Group Table 3.5 3.
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R8C/M11A Group, R8C/M12A Group Table 3.6 3.
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R8C/M11A Group, R8C/M12A Group Table 3.7 3.
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R8C/M11A Group, R8C/M12A Group Table 3.8 3.
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R8C/M11A Group, R8C/M12A Group Table 3.9 3. Address Space ID Code Area and Option Function Select Area Address Area Name Symbol After Reset : Option Function Select Register 2 OFS2 (Note 1) 0FFDBh : ID1 (Note 2) 0FFDFh : ID2 (Note 2) 0FFE3h : ID3 (Note 2) 0FFEBh : ID4 (Note 2) 0FFEFh : ID5 (Note 2) 0FFF3h : ID6 (Note 2) 0FFF7h : ID7 (Note 2) 0FFFBh : Option Function Select Register OFS (Note 1) 0FFFFh Notes: 1. The option function select area is allocated in the flash memory, not in the SFRs.
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R8C/M11A Group, R8C/M12A Group 4. 4. Electrical Characteristics Electrical Characteristics Table 4.
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R8C/M11A Group, R8C/M12A Group Table 4.2 4. Electrical Characteristics Recommended Operating Conditions Symbol Parameter Standard Condition Unit Min. Typ. Max. VCC/AVCC Power supply voltage 1.8 — 5.5 V VSS/AVSS Power supply voltage — 0 — V VIH Input high voltage Other than CMOS input CMOS input VIL Input low voltage 0.8 Vcc — Vcc V 4.0 V ≤ Vcc ≤ 5.5 V 0.65 Vcc — Vcc V 2.7 V ≤ Vcc < 4.0 V 0.7 Vcc — Vcc V 1.8 V ≤ Vcc < 2.7 V 0.8 Vcc — Vcc V 0 — 0.
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R8C/M11A Group, R8C/M12A Group Table 4.3 A/D Converter Characteristics Symbol Parameter — Resolution — Absolute accuracy — 4. Electrical Characteristics A/D conversion clock — Permissible signal source impedance Condition Standard Min. Typ. Max. Unit — — 10 Bit AVcc = 5.0 V AN0 to AN4, AN7 input — — ±3 LSB AVcc = 3.0 V AN0 to AN4, AN7 input — — ±5 LSB AVcc = 1.8 V AN0 to AN4, AN7 input — — ±5 LSB 4.0 V ≤ AVcc ≤ 5.5 V (2) 2 — 20 MHz 3.2 V ≤ AVcc ≤ 5.
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R8C/M11A Group, R8C/M12A Group Table 4.5 4. Electrical Characteristics Flash Memory (Program ROM) Electrical Characteristics Symbol Parameter Condition Standard Min. Typ. Unit Max. 10,000 (3) — — times Byte programming time (program/erase endurance ≤ 1,000 times) — 80 — µs — Byte programming time (program/erase endurance > 1,000 times) — 160 — µs — Block erase time — 0.12 — s td(SR-SUS) Transition time to suspend — — 0.
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R8C/M11A Group, R8C/M12A Group Table 4.6 4. Electrical Characteristics Flash Memory (Blocks A and B of Data Flash) Electrical Characteristics Symbol Parameter Standard Condition Min. Typ. Unit Max. 10,000 (3) — — times Byte programming time — 150 — µs — Block erase time — 0.05 1 s td(SR-SUS) Time delay from suspend request until suspend — — 0.
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R8C/M11A Group, R8C/M12A Group Table 4.7 Symbol Vdet0 4. Electrical Characteristics Voltage Detection 0 Circuit Electrical Characteristics Parameter Condition Standard Unit Min. Typ. Max. Voltage detection level Vdet0_0 (2) 1.80 1.90 2.05 V Voltage detection level Vdet0_1 (2) 2.15 2.35 2.50 V Voltage detection level Vdet0_2 (2) 2.70 2.85 3.05 V (2) 3.55 3.80 4.05 V When Vcc decreases from 5 V to (Vdet0_0 - 0.1) V — 30 — µs VC0E = 1, Vcc = 5.0 V — 1.
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R8C/M11A Group, R8C/M12A Group Table 4.9 4. Electrical Characteristics Power-On Reset Circuit (2) Symbol Parameter Condition External power Vcc rise gradient trth Standard Min. Typ. Max. 0 — 50,000 Unit mV/msec Notes: 1. The measurement condition is Topr = -20 °C to 85 °C (N version)/-40 °C to 85 °C (D version), unless otherwise specified. 2. To use the power-on reset function, enable the voltage monitor 0 reset by setting the LVDAS bit in the OFS register to 0. Vdet0 (1) trth trth 0.
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R8C/M11A Group, R8C/M12A Group Table 4.10 Symbol — 4.
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R8C/M11A Group, R8C/M12A Group Table 4.13 DC Characteristics (1) [4.0 V ≤ Vcc ≤ 5.5 V] Symbol VOH 4. Electrical Characteristics Parameter Output high voltage Condition IOH = -5 mA Output low voltage P1_2, P1_3, P1_4, P1_5, When drive IOL = 20 mA P3_3, P3_4, P3_5, P3_7 (2) capacity is high When drive IOL = 5 mA capacity is low IOL = 5 mA P1_0, P1_1, P1_6, P1_7, P4_2, P4_5, P4_6, P4_7, PA_0 Unit Typ. Max. — Vcc V — Vcc V Vcc - 2.0 — Vcc V — — 2.0 V — — 2.0 V — — 2.
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R8C/M11A Group, R8C/M12A Group Table 4.14 4. Electrical Characteristics DC Characteristics (2) [4.0 V ≤ Vcc ≤ 5.5 V] (Topr = -20 °C to 85 °C (N version)/-40 °C to 85 °C (D version), unless otherwise specified) Condition Oscillation Circuit Symbol Parameter ICC Power supply current (1) CPU Clock XIN (2) HighSpeed LowSpeed 20 MHz Off 125 kHz No division 16 MHz Off 125 kHz 10 MHz Off 20 MHz Low-PowerConsumption Setting Standard Unit Other Min. Typ. (3) Max. — — 3 7.
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R8C/M11A Group, R8C/M12A Group 4. Electrical Characteristics Timing Requirements (Vcc = 5 V, Vss = 0 V at Topr = 25 °C, unless otherwise specified) Table 4.15 External Clock Input (XIN) Symbol Standard Parameter Min. Max. Unit tc(XIN) XIN input cycle time 50 — ns tWH(XIN) XIN input high width 24 — ns tWL(XIN) XIN input low width 24 — ns tC(XIN) Vcc = 5 V tWH(XIN) External Clock input tWL(XIN) Figure 4.4 External Clock Input Timing When Vcc = 5 V Table 4.
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R8C/M11A Group, R8C/M12A Group Table 4.17 4. Electrical Characteristics Serial Interface Symbol Standard Parameter Min. Max.
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R8C/M11A Group, R8C/M12A Group Table 4.19 DC Characteristics (3) [2.7 V ≤ Vcc < 4.0 V] Symbol VOH VOL 4. Electrical Characteristics Parameter Output high voltage Output low voltage Condition Standard Unit Min. Typ. Max. P1_2, P1_3, P1_4, P1_5, When drive IOH = -5 mA P3_3, P3_4, P3_5, P3_7 (2) capacity is high When drive IOH = -1 mA capacity is low Vcc - 0.5 — Vcc V Vcc - 0.5 — Vcc V P1_0, P1_1, P1_6, P1_7, P4_2, P4_5, P4_6, P4_7, PA_0 Vcc - 0.
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R8C/M11A Group, R8C/M12A Group Table 4.20 4. Electrical Characteristics DC Characteristics (4) [2.7 V ≤ Vcc < 4.0 V] (Topr = -20 °C to 85 °C (N version)/-40 °C to 85 °C (D version), unless otherwise specified) Condition Oscillation Circuit Symbol Parameter ICC Power supply current (1) CPU Clock XIN (2) HighSpeed LowSpeed 20 MHz Off 125 kHz No division 16 MHz Off 125 kHz 10 MHz Off 20 MHz Low-PowerConsumption Setting Standard Unit Other Min. Typ. (3) Max. — — 3.0 7.
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R8C/M11A Group, R8C/M12A Group 4. Electrical Characteristics Timing Requirements (Vcc = 3 V, Vss = 0 V at Topr = 25 °C, unless otherwise specified) Table 4.21 External Clock Input (XIN) Symbol Standard Parameter Min. Max. Unit tc(XIN) XIN input cycle time 50 — ns tWH(XIN) XIN input high width 24 — ns tWL(XIN) XIN input low width 24 — ns tC(XIN) Vcc = 3 V tWH(XIN) External Clock input tWL(XIN) Figure 4.8 External Clock Input Timing When Vcc = 3 V Table 4.
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R8C/M11A Group, R8C/M12A Group Table 4.23 4. Electrical Characteristics Serial Interface Symbol Standard Parameter Min. Max.
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R8C/M11A Group, R8C/M12A Group Table 4.25 DC Characteristics (5) [1.8 V ≤ Vcc < 2.7 V] Symbol VOH VOL 4. Electrical Characteristics Parameter Output high voltage Output low voltage Condition Standard Unit Min. Typ. Max. P1_2, P1_3, P1_4, P1_5, When drive IOH = -2 mA P3_3, P3_4, P3_5, P3_7 (2) capacity is high When drive IOH = -1 mA capacity is low Vcc - 0.5 — Vcc V Vcc - 0.5 — Vcc V P1_0, P1_1, P1_6, P1_7, P4_2, P4_5, P4_6, P4_7, PA_0 Vcc - 0.
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R8C/M11A Group, R8C/M12A Group Table 4.26 4. Electrical Characteristics DC Characteristics (6) [1.8 V ≤ Vcc < 2.
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R8C/M11A Group, R8C/M12A Group 4. Electrical Characteristics Timing Requirements (Vcc = 2.2 V, Vss = 0 V at Topr = 25 °C, unless otherwise specified) Table 4.27 External Clock Input (XIN) Symbol Standard Parameter Min. Max. Unit tc(XIN) XIN input cycle time 200 — ns tWH(XIN) XIN input high width 90 — ns tWL(XIN) XIN input low width 90 — ns tC(XIN) Vcc = 2.2 V tWH(XIN) External Clock input tWL(XIN) Figure 4.12 Table 4.28 External Clock Input Timing When Vcc = 2.
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R8C/M11A Group, R8C/M12A Group Table 4.29 4. Electrical Characteristics Serial Interface Symbol Standard Parameter Min. Max. Unit tc(CK) CLK0 input cycle time 800 — tW(CKH) CLK0 input high width 400 — ns tW(CKL) CLK0 input low width 400 — ns td(C-Q) TXD0 output delay time — 200 ns th(C-Q) TXD0 hold time 0 — ns tsu(D-C) RXD0 input setup time 150 — ns th(C-D) RXD0 input hold time 90 — ns tC(CK) ns Vcc = 2.
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R8C/M11A Group, R8C/M12A Group Package Dimensions Package Dimensions Diagrams showing the latest package dimensions and mounting information are available in the “Packages” section of the Renesas Electronics website. JEITA Package Code P-TSSOP14-4.4x5-0.65 RENESAS Code PTSP0014JA-B *1 Previous Code TTP-14DV MASS[Typ.] 0.05g D NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
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R8C/M11A Group, R8C/M12A Group JEITA Package Code P-LSSOP20-4.4x6.5-0.65 RENESAS Code PLSP0020JB-A Previous Code 20P2F-A MASS[Typ.] 0.1g 11 20 *1 E HE Package Dimensions NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. F 1 10 Index mark c A1 Reference Symbol D D E A2 A A1 bp c L *2 A2 A S *3 e bp Detail F y S HE e y L JEITA Package Code P-DIP20-6.6x25.9-2.
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REVISION HISTORY Rev. Date R8C/M11A Group, R8C/M12A Group Datasheet Description Page Summary 0.01 Jan 14, 2010 — First Edition issued 0.10 Aug 25, 2010 — Document No. “REJ03B0308” → “R01DS0010EJ” 2, 3 4 Table 1.3 “Reset by voltage detection 0” deleted 5 Table 1.4 “... ROM: VCC = 2.7 V to 5.5 V” → “... ROM: VCC = 1.8 V to 5.5 V”, “1,000 times (program ROM)” → “10,000 times (program ROM)”, Note 1 added 6 Table 1.5 revised 8 Figures 1.3 and 1.4 revised 9 Table 1.6 revised 11 to 43 1.
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General Precautions in the Handling of MPU/MCU Products The following usage notes are applicable to all MPU/MCU products from Renesas. For detailed usage notes on the products covered by this manual, refer to the relevant sections of the manual. If the descriptions under General Precautions in the Handling of MPU/MCU Products and in the body of the manual differ from each other, the description in the body of the manual takes precedence. 1.
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Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 2.