Datasheet
R01DS0011EJ0101 Rev.1.01 Page 20 of 102
Oct 28, 2011
R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, R8C/LA8A Group 1. Overview
Figure 1.11 Pin Assignment (Top View) of PLQP0064KB-A and PLQP0064GA-A Packages
20
21
22
23
24
25
26
27
28
29
30
31
32
19
18
17
61
60
59
58
57
56
55
54
53
52
51
50
49
62
63
64
36373839404142434445464748 333435
13121110987654321161514
P1_7/SEG15
P2_0/SEG16
P2_4/SEG20
P2_5/SEG21
P2_6/SEG22
P2_1/SEG17
P2_2/SEG18
P2_3/SEG19
P1_2/SEG10/KI6
P1_5/SEG13/INT5
P1_6/SEG14/INT6
P2_7/SEG23
P3_0/SEG24(/INT0)
P3_1/SEG25(/INT1)
P1_3/SEG11/KI7
P1_4/SEG12/INT4
PLQP0064KB-A (64P6Q-A)
PLQP0064GA-A (64P6U-A)
(top view)
R8C/LA6A Group
P5_4/VL1
P5_3/COM0
P5_2/COM1
P5_1/COM2
P5_0/COM3
P4_7/SEG39/COMEXP
P4_6/SEG38
P3_7/SEG31(/INT7)
P3_6/SEG30(/INT6)
P3_5/SEG29(/INT5)
P3_4/SEG28(/INT4)
P3_3/SEG27(/INT3)
P3_2/SEG26(/INT2)
P5_5/VL2
P5_6/VL3
P8_0/SCS/IVCMP1/INT1
P6_3(/SSCK/SCL)/AN6
P6_4(/SSO/SDA)/AN7
P6_5(/TRCIOD/TRCIOB)/IVREF1(/TRB1O)/AN8
P6_6(/TRCIOC/TRCIOB)/IVREF3(/TRB0O)/AN9
P6_7(/TRCIOB)/AN10
P0_0/SEG0(/TRCIOA/TRCTRG)/AN11
P0_1/SEG1/INT7(/TRCCLK/TRCTRG)/ADTRG
P0_2/SEG2(/TRCTRG)/KI0
P0_3/SEG3/INT0/KI1
P0_4/SEG4/KI2
P0_5/SEG5/KI3
P0_6/SEG6/KI4
P0_7/SEG7/TRHO/KI5
P6_2(/TRJ0IO/SSI)/AN5
P6_1(/TRJ1IO/SCS)/AN4
P8_7/TRB0O/INT2(/CTS2/RTS2)
RESET
P9_1/XOUT
P8_6(/RXD0/RXD2/SCL2)
P8_5(/TXD0/TXD2/SDA2)
P8_4(/CLK0/CLK2)
VSS/AVSS
P9_0/XIN
VCC/AVCC
WKUP0
XCIN
XCOUT
P8_3/SSO/SDA(/TRJ0IO)
P8_2/SSCK/SCL(/TRJ1IO)
P8_1/SSI/IVCMP3/INT3
VREF
MODE
Notes:
1. The pin in parentheses can be assigned by a program.
2. Confirm the pin 1 position on the package by referring to the Package Dimensions.