Datasheet

R01DS0011EJ0101 Rev.1.01 Page 15 of 102
Oct 28, 2011
R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, R8C/LA8A Group 1. Overview
Figure 1.8 Block Diagram of R8C/LA8A Group
Watchdog timer
(14 bits)
System clock generation
circuit
XIN-XOUT
High-speed on-chip oscillator
Low-speed on-chip oscillator
XCIN-XCOUT
RAM
(2)
Multiplier
Timers
Timer RB (8 bits × 2)
Timer RC (16 bits × 1)
Timer RH
Timer RJ (16 bits × 3)
R8C CPU core
Memory
R0H R0L
R1H
R2
R3
R1L
A0
A1
FB
SB
USP
ISP
INTB
PC
FLG
I/O ports
A/D converter
(10 bits
× 12 channels)
UART or
clock synchronous serial I/O
(8 bits × 1)
I
2
C bus or SSU
(8 bits × 1)
UART,
clock synchronous serial I/O,
or I
2
C bus (8 bits × 1)
8
Port P0
8
Port P1
8
Port P3
7
Port P5
Port P4
8
Port P2
ROM
(1)
Peripheral functions
LCD drive control circuit
Common output: Max. 4 pins
Segment output: Max. 40 pins
Temperature Sensor
8
Port P6
8
Port P8
2
Port P9
7
Port P7
8
Comparator B 2ch
Notes:
1. ROM capacity varies with MCU type.
2. RAM capacity varies with MCU type.
Voltage detection circuit
Low-speed on-chip oscillator
for watchdog timer