Datasheet

R8C/38C Group 1. Overview
R01DS0017EJ0110 Rev.1.10 Page 7 of 55
Nov 02, 2010
1.4 Pin Assignment
Figure 1.3 shows Pin Assignment (Top View). Tables 1.4 and 1.5 outline the Pin Name Information by Pin
Number.
Figure 1.3 Pin Assignment (Top View)
R8C/38C Group
PLQP0080KB-A (80P6Q-A)
(Top view)
55 54 53 52 51 50 49 48
32
25
26
27
28
29
30
31
1 3 4 5 6 7 8 9
10 11 12
2
72
71
70
69
68
67
66
65
64
63
62
61
47 46 45
13 14 15 16
33
34
35
36
37
38
39
40
73
74
75
76
56 57 58 59 60
17 18 19 20
44 43 42 41
21
22
23
24
77
78
79
80
Notes:
1. Can be assigned to the pin in parentheses by a program.
2. P4_2 is an input-only pin.
3. Confirm the pin 1 position on the package by referring to the package dimensions.
P7_3/AN15
P7_2/AN14
P7_1/AN13
P7_0/AN12
P0_7/AN0/DA1(/TRCIOC)
P0_6/AN1/DA0(/TRCIOD)
P0_5/AN2(/TRCIOB)
P0_4/AN3(/TRCIOB/TREO)
P0_3/AN4(/CLK1/TRCIOB)
P0_2/AN5(/RXD1/TRCIOA/TRCTRG)
P0_1/AN6(/TXD1/TRCIOA/TRCTRG)
P0_0/AN7(/TRCIOA/TRCTRG)
P6_4(/RXD1)
P6_3(/TXD1)
P6_2(/CLK1)
P6_1
P6_0(/TREO)
P9_5
P9_4
P5_7(/TRGIOB)
P8_4(/TRFO11)
P8_5(/TRFO12)
P8_6
P8_7
P3_1(/TRBO)
P3_6(/INT1)
P9_0
P9_1
P9_2
P9_3
P2_0(/INT1/TRCIOB/TRDIOA0/TRDCLK)
P2_1(/TRCIOC/TRDIOC0)
P2_2(/TRCIOD/TRDIOB0)
P2_3(/TRDIOD0)
P2_4(/TRDIOA1)
P2_5(/TRDIOB1)
P2_6(/TRDIOC1)
P2_7(/TRDIOD1)
P3_3/IVCMP3/INT3/SCS(/CTS2/RTS2/TRCCLK)
P3_4/IVREF3/SSI(/TXD2/SDA2/RXD2/SCL2/TRCIOC)
P5_6(/TRAO/TRGIOA)
P5_5(/TRAIO)
P3_2(/INT1/INT2/TRAIO/TRGCLKB)
P3_0(/TRAO/TRGCLKA)
P4_2/VREF
MODE
P4_3(/XCIN)
P4_4(/XCOUT)
RESET
P4_7/XOUT
VSS/AVSS
P4_6/XIN
VCC/AVCC
P5_4(/TRCIOD) P5_3(/TRCIOC)
P5_2(/TRCIOB)
P5_1(/TRCIOA/TRCTRG)
P5_0(/TRCCLK)
P3_7/SDA/SSO/TRAO(/TXD2/SDA2/RXD2/SCL2)
P3_5/SCL/SSCK(/CLK2/TRCIOD)
P7_4/AN16 P7_5/AN17 P7_6/AN18 P7_7/AN19 P1_0/AN8/KI0(/TRCIOD) P1_1/AN9/KI1(/TRCIOA/TRCTRG) P1_2/AN10/KI2(/TRCIOB) P1_3/AN11/KI3/TRBO(/TRCIOC) P1_4(/TXD0/TRCCLK) P1_5(/INT1/RXD0/TRAIO) P1_6/IVREF1(/CLK0) P1_7/IVCMP/INT1(/TRAIO) P4_5/ADTRG/INT0(/RXD2/SCL2) P6_5/INT4(/CLK2/CLK1/TRCIOB) P6_6/INT2(/TXD2/SDA2/TRCIOC) P6_7(/INT3/TRCIOD) P8_0(/TRFO00) P8_1(/TRFO01) P8_2(/TRFO02) P8_3(/TRFI/TRFO10)