Datasheet

R8C/36C Group 1. Overview
R01DS0018EJ0110 Rev.1.10 Page 7 of 59
Nov 02, 2010
1.3 Block Diagram
Figure 1.2 shows a Block Diagram.
Figure 1.2 Block Diagram
D/A converter
(8 bits
× 2)
R8C CPU core
System clock generation
circuit
XIN-XOUT
High-speed on-chip oscillator
Low-speed on-chip oscillator
XCIN-XCOUT
Memory
ROM
(1)
RAM
(2)
Multiplier
R0H R0L
R1H
R2
R3
R1L
A0
A1
FB
SB
USP
ISP
INTB
PC
FLG
I/O ports
Notes:
1. ROM size varies with MCU type.
2. RAM size varies with MCU type.
Timers
Timer RA (8 bits × 1)
Timer RB (8 bits × 1)
Timer RC (16 bits × 1)
Timer RD (16 bits × 2)
Timer RE (8 bits × 1)
Timer RF (16 bits × 1)
Timer RG (16 bits × 1)
UART or
clock synchronous serial I/O
(8 bits × 3)
I
2
C bus or SSU
(8 bits × 1)
Peripheral functions
Watchdog timer
(14 bits)
A/D converter
(10 bits
× 12 channels)
LIN module
Comparator B
Voltage detection circuit
DTC
Low-speed on-chip oscillator
for watchdog timer
7
Port P5
5 1
Port P4
8
Port P3
8
Port P0
8
Port P1
8
Port P2
8
Port P6
7
Port P8