Datasheet

R8C/36C Group 5. Electrical Characteristics
R01DS0018EJ0110 Rev.1.10 Page 56 of 59
Nov 02, 2010
i = 0 to 2
Figure 5.21 Serial Interface Timing Diagram when VCC = 2.2 V
Notes:
1. When selecting the digital filter by the INTi
input filter select bit, use an INTi input HIGH width of either (1/digital filter clock
frequency × 3) or the minimum value of standard, whichever is greater.
2. When selecting the digital filter by the INTi
input filter select bit, use an INTi input LOW width of either (1/digital filter clock
frequency × 3) or the minimum value of standard, whichever is greater.
Figure 5.22 Input Timing Diagram for External Interrupt INTi and Key Input Interrupt KIi
when V
CC = 2.2 V
Table 5.36 Serial Interface
Symbol Parameter
Standard
Unit
Min. Max.
t
c(CK) CLKi input cycle time 800 — ns
t
W(CKH) CLKi input “H” width 400 — ns
t
W(CKL) CLKi input “L” width 400 — ns
t
d(C-Q) TXDi output delay time — 200 ns
t
h(C-Q) TXDi hold time 0—ns
t
su(D-C) RXDi input setup time 150 — ns
t
h(C-D) RXDi input hold time 90 — ns
Table 5.37 External Interrupt INTi (i = 0 to 4) Input, Key Input Interrupt KIi (i = 0 to 3)
Symbol Parameter
Standard
Unit
Min. Max.
t
W(INH)
INTi input “H” width, KIi input “H” width
1000
(1)
—ns
t
W(INL)
INTi input “L” width, KIi input “L” width
1000
(2)
—ns
tW(CKH)
tC(CK)
tW(CKL)
th(C-Q)
th(C-D)
tsu(D-C)td(C-Q)
CLKi
TXDi
RXDi
VCC = 2.2 V
i = 0 to 2
tW(INL)
tW(INH)
VCC = 2.2 V
INTi input
(i = 0 to 4)
KIi input
(i = 0 to 3)