Datasheet

R8C/2K Group, R8C/2L Group 5. Electrical Characteristics
Rev.1.10 Dec 21, 2007 Page 30 of 45
REJ03B0219-0110
NOTES:
1. The measurement condition is T
opr = −20 to 85°C (N version) / −40 to 85°C (D version), unless otherwise specified.
2. This condition (external power V
CC rise gradient) does not apply if VCC ≥ 1.0 V.
3. To use the power-on reset function, enable voltage monitor 0 reset by setting the LVD0ON bit in the OFS register to 0, the
VW0C0 and VW0C6 bits in the VW0C register to 1 respectively, and the VCA25 bit in the VCA2 register to 1.
4. t
w(por1) indicates the duration the external power VCC must be held below the effective voltage (Vpor1) to enable a power on
reset. When turning on the power for the first time, maintain t
w(por1) for 30 s or more if −20°C ≤ Topr ≤ 85°C, maintain tw(por1) for
3,000 s or more if −40°C ≤ T
opr < −20°C.
Figure 5.3 Reset Circuit Electrical Characteristics
Table 5.9 Power-on Reset Circuit, Voltage Monitor 0 Reset Electrical Characteristics
(3)
Symbol Parameter Condition
Standard
Unit
Min. Typ. Max.
V
por1
Power-on reset valid voltage
(4)
−−0.1 V
V
por2 Power-on reset or voltage monitor 0 reset valid
voltage
0 − Vdet0 V
t
rth
External power VCC rise gradient
(2)
20 −−mV/msec
NOTES:
1. When using the voltage monitor 0 digital filter, ensure that the voltage is within the MCU operation voltage
range (2.2 V or above) during the sampling time.
2. The sampling clock can be selected. Refer to 6. Voltage Detection Circuit for details.
3. V
det0 indicates the voltage detection level of the voltage detection 0 circuit. Refer to 6. Voltage Detection
Circuit for details.
Vdet0
(3)
Vpor1
Internal
reset signal
(“L” valid)
t
w(por1)
Sampling time
(1, 2)
Vdet0
(3)
1
f
OCO-S
× 32
1
f
OCO-S
× 32
Vpor2
2.2V
External
Power V
CC
trth
trth