Datasheet

R8C/2K Group, R8C/2L Group 1. Overview
Rev.1.10 Dec 21, 2007 Page 8 of 45
REJ03B0219-0110
1.3 Block Diagram
Figure 1.3 shows a Block Diagram.
Figure 1.3 Block Diagram
R8C/Tiny Series CPU core
Memory
ROM
(1)
RAM
(2)
Multiplier
R0H R0L
R1H
R2
R3
R1L
A0
A1
FB
SB
USP
ISP
INTB
PC
FLG
I/O ports
NOTES:
1. ROM size varies with MCU type.
2. RAM size varies with MCU type.
8
Port P1
3
Port P3
1 3
Port P4
5
Port P0
8
Port P2
System clock
generation circuit
XIN-XOUT
High-speed on-chip oscillator
Low-speed on-chip oscillator
Timers
Timer RA (8 bits × 1)
Timer RB (8 bits × 1)
Timer RC (16 bits × 1)
Timer RD (16 bits × 2)
UART or
clock synchronous serial I/O
(8 bits × 2)
LIN module
Peripheral functions
Watchdog timer
(15 bits)
A/D converter
(10 bits
× 9 channels)