Datasheet

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REVISION HISTORY R8C/24 Group, R8C/25 Group Datasheet
0.30 Sep 01, 2005 19 Tabel 4.5 SFR Information(5) revised:
• 0118h : Timer RE Second Data Register/Counter Register
→
Timer RE Second Data Register/Counter Data Register
20 Tabel 4.6 SFR Information(6) revised:
• 0145h POCR0
→ TRDPOCR0
• 0146h, 0147h TRDCNT0
→ TRD0
• 0148h, 0149h GRA0
→ TRDGRA0
• 014Ah, 014Bh GRB0
→ TRDGRB0
• 014Ch, 014Dh GRC0
→ TRDGRC0
• 014Eh, 014Fh GRD0
→ TRDGRD0
• 0155h POCR1
→ TRDPOCR1
• 0156h, 0157h TRDCNT1
→ TRD1
• 0158h, 0159h GRA1
→ TRDGRA1
• 015Ah, 015Bh GRB1
→ TRDGRB1
• 015Ch, 015Dh GRC1
→ TRDGRC1
• 015Eh, 015Fh GRD1
→ TRDGRD1
21 Tabel 4.7 SFR Information(7) revised:
• 01B5h: 01000101b
→ 1000000Xb
• 01B7h: XX000001b
→ 00000001b
• FFFFh: (Note 2) added
22 to 44 5. Electrical Characteristics added
0.40 Jan 24, 2006 all pages • “Preliminary” deleted
• Symbol name “TRDMDR”
→ “TRDMR”, “SSUAIC” → “SSUIC”, and
“IIC2AIC”
→ “IICIC” revised
• Pin name “TCLK”
→ “TRDCLK” revised
2 Table 1.1 Functions and Specifications for R8C/24 Group revised
3 Table 1.2 Functions and Specifications for R8C/25 Group revised
4 Figure 1.1 Block Diagram;
“Peripheral Functions” added,
“System Clock Generation”
→ “System Clock Generator” revised
5 Table 1.3 Product Information for R8C/24 Group revised
6 Table 1.4 Product Information for R8C/25 Group revised
7 Figure 1.4 Pin Assignments (Top View) “TCLK”
→ “TRDCLK” revised
8 Table 1.5 Pin Functions “TCLK”
→ “TRDCLK” revised
9 Table 1.6 Pin Name Information by Pin Number;
“TCLK”
→ “TRDCLK” revised
10 Figure 2.1 CPU Registers;
“Reserved Area”
→ “Reserved Bit” revised
12 2.8.10 Reserved Area;
“Reserved Area”
→ “Reserved bit” revised
13 Figure 3.1 Memory Map of R8C/24 Group;
“Program area”
→ “program ROM” revised
14 3.2 R8C/25 Group, Figure 3.2 Memory Map of R8C/25 Group;
“Data area”
→ “data flash”, “Program area” → “program ROM” revised
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