Datasheet

RL78/L12 CHAPTER 29 INSTRUCTION SET
R01UH0330EJ0200 Rev.2.00 840
Dec 13, 2013
Table 29-5. Operation List (4/17)
Notes 1. Number of CPU clocks (fCLK) when the internal RAM area, SFR area, or extended SFR area is accessed, or
when no data is accessed.
2. Number of CPU clocks (f
CLK) when the code flash memory is accessed, or when the data flash memory is
accessed by an 8-bit instruction.
3. Except rp = AX
Remark Number of clock is when program exists in the internal ROM (flash memory) area. If fetching the instruction
from the internal RAM area, the number becomes double number plus 3 clocks at a maximum.
Instruction
Group
Mnemonic Operands Bytes Clocks Clocks Flag
Note 1 Note 2 Z AC CY
8-bit data
transfer
XCH A, [HL+B] 2 2
−
A ←→ (HL+B)
A, ES:[HL+B] 3 3
−
A ←→ ((ES, HL)+B)
A, [HL+C] 2 2
−
A ←→ (HL+C)
A, ES:[HL+C] 3 3
−
A ←→ ((ES, HL)+C)
ONEB A 1 1
−
A ← 01H
X 1 1
−
X ← 01H
B 1 1
−
B ← 01H
C 1 1
−
C ← 01H
!addr16 3 1
−
(addr16) ← 01H
ES:!addr16 4 2
−
(ES, addr16) ← 01H
saddr 2 1
−
(saddr) ← 01H
CLRB A 1 1
−
A ← 00H
X 1 1
−
X ← 00H
B 1 1
−
B ← 00H
C 1 1
−
C ← 00H
!addr16 3 1
−
(addr16) ← 00H
ES:!addr16 4 2
−
(ES,addr16) ← 00H
saddr 2 1
−
(saddr) ← 00H
MOVS [HL+byte], X 3 1
−
(HL+byte) ← X × ×
ES:[HL+byte], X 4 2
−
(ES, HL+byte) ← X × ×
16-bit
data
transfer
MOVW rp, #word 3 1
−
rp ← word
saddrp, #word 4 1
−
(saddrp) ← word
sfrp, #word 4 1
−
sfrp ← word
AX, rp
Note 3
1 1
−
AX ← rp
rp, AX
Note 3
1 1
−
rp ← AX
AX, !addr16 3 1 4 AX ← (addr16)
!addr16, AX 3 1
−
(addr16) ← AX
AX, ES:!addr16 4 2 5 AX ← (ES, addr16)
ES:!addr16, AX 4 2
−
(ES, addr16) ← AX
AX, saddrp 2 1
−
AX ← (saddrp)
saddrp, AX 2 1
−
(saddrp) ← AX
AX, sfrp 2 1
−
AX ← sfrp
sfrp, AX 2 1
−
sfrp ← AX