Datasheet

RL78/L12 CHAPTER 23 SAFETY FUNCTIONS
R01UH0330EJ0200 Rev.2.00 795
Dec 13, 2013
output/internal reference voltage output is selected (example for software trigger mode
and one-shot conversion mode).
9. If a transition is made to STOP mode or a transition is made to HALT mode during CPU
operation with subsystem clock, do not set ADISS to 1. When ADISS is 1, the A/D
converter reference voltage current (I
ADREF) shown in 30.3.2 or 31.3.2 Supply current
characteristics is added.