Datasheet

RL78/L12 CHAPTER 22 VOLTAGE DETECTOR
R01UH0330EJ0200 Rev.2.00 768
Dec 13, 2013
Figure 22-5. Timing of Voltage Detector Internal Interrupt Signal Generation
(Option Byte LVIMDS1, LVIMDS0 = 0, 1)
H
Time
Cleared
H
Note 1
Supply voltage (V DD )
V POR = 1.51 V (TYP.)
V
PDR = 1.50 V (TYP.)
LVIMK flag
(interrupt MASK)
(set by software)
Internal reset signal
POR reset signal
LVD reset signal
LVIIF flag
INTLVI
LVILV flag
LVIMD flag
LVIF flag
V
LVD
Lower limit of operation voltage
Note 2Note 2
Cleared by
software
Notes 1. The LVIMK flag is set to “1” by reset signal generation.
2. When the voltage falls, this LSI should be placed in the STOP mode, or placed in the reset state by
controlling the externally input reset signal, before the voltage falls below the operating voltage range
defined in 30.4 or 31.4 AC characteristics. When restarting the operation, make sure that the operation
voltage has returned within the range of operation.
Remark V
POR: POR power supply rise detection voltage
VPDR: POR power supply fall detection voltage
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