Datasheet

RL78/L12 CHAPTER 18 KEY INTERRUPT FUNCTION
R01UH0330EJ0200 Rev.2.00 727
Dec 13, 2013
18.3.2 Key return mode register 0 (KRM0)
This register sets the key interrupt mode.
The KRM0 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
Figure 18-3. Format of Key Return Mode Register 0 (KRM0)
Address: FFF37H After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
KRM0 0 0 0 0 KRM03 KRM02 KRM01 KRM00
KRM0n Key interrupt mode control
0 Does not detect key interrupt signal
1 Detects key interrupt signal
Cautions 1. The internal pull-up resistor can be used by setting the corresponding bits to 1 in
the pull-up resistor registers 1, 3, 7, and 14 (PU1, PU3, PU7, PU14) of key interrupt
input pins.
2. An interrupt will be generated if the target bit of the KRM0 register is set while a
low level (when KREG = 0)/high level (when KREG = 1) is being input to the key
interrupt input pin. To ignore this interrupt, set the KRM0 register after disabling
interrupt servicing by using the interrupt mask flag. Afterward, clear the interrupt
request flag and enable interrupt servicing after waiting for the key interrupt input
high-level width/low-level width (see 30.4 or 31.4 AC Characteristics).
3. The pins not used in the key interrupt mode can be used as normal ports.
Remark n = 0 to 3
18.3.3 Key return flag register (KRF)
This register controls the key interrupt flags (KRF0 to KRF3).
The KRF register can be set by an 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 18-4. Format of Key return Flag Register (KRF)
Address: FFF35H After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
KRF 0 0 0 0 KRF3 KRF2 KRF1 KRF0
KRFn Key interrupt flag (n = 0 to 3)
0 No key interrupt signal has been detected.
1 A key interrupt signal has been detected.
Caution When KRMD = 0, setting the KRFn bit to 1 is prohibited.