Datasheet

RL78/L12 CHAPTER 14 LCD CONTROLLER/DRIVER
R01UH0330EJ0200 Rev.2.00 619
Dec 13, 2013
The following shows the VL3/P125 pin function status transitions.
Figure 14-9. V
L3/P125 Pin Function Status Transitions
Reset status
Reset release
ISCVL3 = 1
LBAS1, LBAS0 = 10
PMmn = 0
PMmn = 1
Digital input
ineffective mode
V L3
function mode
Digital input
mode
Digital output
mode
Caution Be sure to set the VL3 function mode before segment output starts (while SCOC bit of LCD
mode register 1 (LCDM1) is 0).
• CAPL/P126 and CAPH/P127
Table 14-6. Settings of CAPL/P126 and CAPH/P127 Pin Functions
LCD Drive Voltage Generator
(MDSET1 and MDSET0 Bits of
LCDM0 Register)
ISCCAP Bit of
ISCLCD Register
PM126 and
PM127 Bits of
PM12 Register
Pin Function Initial Status
External resistance division
(MDSET1, MDSET0 = 00)
0 1 Digital input ineffective mode
√
1 0 Digital output mode
−
1 1 Digital input mode
−
Internal voltage boosting or
capacitor split
(MDSET1, MDSET0 = 01 or 10)
0 1 CAPL/CAPH function mode
−
Other than above Setting prohibited
The following shows the CAPL/P126 and CAPH/P127 pin function status transitions.
Figure 14-10. CAPL/P126 and CAPH/P127 Pin Function Status Transitions
Reset status
Reset release
ISCCAP = 1
MDSET1, MDSET0 = 01 or 10
MDSET1, MDSET0 = 00
PMmn = 0
PMmn = 1
Digital input
ineffective mode
CAPL/CAPH
function mode
Digital input
mode
Digital output
mode
Caution Be sure to set the CAPL/CAPH function mode before segment output starts (while SCOC bit
of LCD mode register 1 (LCDM1) is 0).