Datasheet
RL78/L12    CHAPTER 2 PIN FUNCTIONS 
R01UH0330EJ0200 Rev.2.00      24 
Dec 13, 2013 
2.1.3 48-pin products 
 (1/2) 
Function 
Name 
Pin Type  I/O  After Reset  Alternate Function  Function 
P10 8-5-7  I/O 
Digital input 
invalid 
SCK00/TI07/TO07/ 
SEG28/ 
(INTP1) 
Port 1. 
8-bit I/O port. 
Input/output can be specified in 1-bit units. 
Use of an on-chip pull-up resistor can be specified 
by a software setting at input port. 
Input of P10, P11, P15, and P16 can be set to TTL 
input buffer. 
Output of P10, P12, P15, and P17 can be set to N-
ch open-drain output (V
DD tolerance). 
P13 and P14 can be set to analog input
 Note 1
. 
P11 8-5-1 
SI00/RxD0/ 
TOOLRxD/SEG29/ 
(INTP2) 
P12 7-5-7 
SO00/TxD0/ 
TOOLTxD/SEG30/ 
(TI02)/(TO02) 
P13 7-10-1 
Analog input 
port 
ANI18/SEG31 
P14 ANI19/SEG32 
P15 8-5-7 
Digital input 
invalid 
SCK01/INTP1/SEG4 
P16 8-5-1  SI01/INTP2/SEG5 
P17 7-5-7  SO01/TI02/TO02/SEG6
P20 4-3-1  I/O 
Analog input 
port 
ANI0/AV
REFP 
Port 2. 
2-bit I/O port. 
Input/output can be specified in 1-bit units. 
Can be set to analog input
 Note 2
. 
P21 ANI1/AVREFM 
P30 7-5-1  I/O 
Digital input 
invalid 
TI01/TO01/KR3/ 
SEG19 
Port 3. 
3-bit I/O port. 
Input/output can be specified in 1-bit units. 
Use of an on-chip pull-up resistor can be specified 
by a software setting at input port. 
P31 
INTP3/RTC1HZ/ 
KR2/SEG18 
P32 
TI03/TO03/INTP4/ 
KR1/SEG17 
P40 7-1-1  I/O Input port TOOL0 
Port 4. 
2-bit I/O port. 
Input/output can be specified in 1-bit units. 
Use of an on-chip pull-up resistor can be specified 
by a software setting at input port. 
P41 can be set to analog input
 Note 1
. 
P41 7-10-1 
Analog input 
port 
ANI16/TI04/TO04/ 
SEG24 
Notes 1.  When the each pin is used as input, specify them as either digital or analog in Port mode control register X 
(PMCX) (This register can be specified in 1-bit unit). 
 2. Setting digital or analog to each pin can be done in A/D port configuration register (ADPC). 
Remark  Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection 
register (PIOR). Refer to Figure 4-8 Format of Peripheral I/O Redirection Register (PIOR). 
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