Datasheet
RL78/L12 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0330EJ0200 Rev.2.00 432
Dec 13, 2013
Figure 12-39. Example of Contents of Registers for Master Transmission/Reception of 3-Wire Serial I/O
(CSI00, CSI01) (2/2)
(e) Serial output enable register m (SOEm) … Sets only the bits of the target channel to 1.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SOEm
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOEm1
0/1
SOEm0
0/1
(f) Serial channel start register m (SSm) … Sets only the bits of the target channel to 1.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SSm
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SSm1
0/1
SSm0
0/1
Remarks 1. m: Unit number (m = 0), n: Channel number (n = 0, 1), p: CSI number (p = 00, 01), mn = 00, 01
2. : Setting disabled (set to the initial value)
×: Bit that cannot be used in this mode (set to the initial value when not used in any mode)
0/1: Set to 0 or 1 depending on the usage of the user